mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-14 23:48:56 +00:00
[InstCombine][SSE] Demanded vector elements for scalar intrinsics (Part 2 of 2)
Split from D17490. This patch improves support for determining the demanded vector elements through SSE scalar intrinsics: 1 - demanded vector element support for unary and some extra binary scalar intrinsics (RCP/RSQRT/SQRT/FRCZ and ADD/CMP/DIV/ROUND). 2 - addss/addsd get simplified to a fadd call if we aren't interested in the pass through elements 3 - if we don't need the lowest element of a scalar operation then just use the first argument (the pass through elements) directly We can add support for propagating demanded elements through any equivalent packed SSE intrinsics in a future patch (these wouldn't use the pass through patterns). Differential Revision: http://reviews.llvm.org/D19318 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267357 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim
parent
0a660a2b80
commit
6efee72867
@ -1179,16 +1179,41 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
|
||||
switch (II->getIntrinsicID()) {
|
||||
default: break;
|
||||
|
||||
// Unary vector operations that work column-wise.
|
||||
case Intrinsic::x86_sse_rcp_ss:
|
||||
case Intrinsic::x86_sse_rsqrt_ss:
|
||||
case Intrinsic::x86_sse_sqrt_ss:
|
||||
case Intrinsic::x86_sse2_sqrt_sd:
|
||||
case Intrinsic::x86_xop_vfrcz_ss:
|
||||
case Intrinsic::x86_xop_vfrcz_sd:
|
||||
TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0), DemandedElts,
|
||||
UndefElts, Depth + 1);
|
||||
if (TmpV) { II->setArgOperand(0, TmpV); MadeChange = true; }
|
||||
|
||||
// If lowest element of a scalar op isn't used then use Arg0.
|
||||
if (DemandedElts.getLoBits(1) != 1)
|
||||
return II->getArgOperand(0);
|
||||
// TODO: If only low elt lower SQRT to FSQRT (with rounding/exceptions checks).
|
||||
break;
|
||||
|
||||
// Binary vector operations that work column-wise. A dest element is a
|
||||
// function of the corresponding input elements from the two inputs.
|
||||
case Intrinsic::x86_sse_add_ss:
|
||||
case Intrinsic::x86_sse_sub_ss:
|
||||
case Intrinsic::x86_sse_mul_ss:
|
||||
case Intrinsic::x86_sse_div_ss:
|
||||
case Intrinsic::x86_sse_min_ss:
|
||||
case Intrinsic::x86_sse_max_ss:
|
||||
case Intrinsic::x86_sse_cmp_ss:
|
||||
case Intrinsic::x86_sse2_add_sd:
|
||||
case Intrinsic::x86_sse2_sub_sd:
|
||||
case Intrinsic::x86_sse2_mul_sd:
|
||||
case Intrinsic::x86_sse2_div_sd:
|
||||
case Intrinsic::x86_sse2_min_sd:
|
||||
case Intrinsic::x86_sse2_max_sd:
|
||||
case Intrinsic::x86_sse2_cmp_sd:
|
||||
case Intrinsic::x86_sse41_round_ss:
|
||||
case Intrinsic::x86_sse41_round_sd:
|
||||
TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0), DemandedElts,
|
||||
UndefElts, Depth + 1);
|
||||
if (TmpV) { II->setArgOperand(0, TmpV); MadeChange = true; }
|
||||
@ -1201,11 +1226,14 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
|
||||
if (DemandedElts == 1) {
|
||||
switch (II->getIntrinsicID()) {
|
||||
default: break;
|
||||
case Intrinsic::x86_sse_add_ss:
|
||||
case Intrinsic::x86_sse_sub_ss:
|
||||
case Intrinsic::x86_sse_mul_ss:
|
||||
case Intrinsic::x86_sse2_add_sd:
|
||||
case Intrinsic::x86_sse2_sub_sd:
|
||||
case Intrinsic::x86_sse2_mul_sd:
|
||||
// TODO: Lower MIN/MAX/ABS/etc
|
||||
// TODO: Lower MIN/MAX/etc.
|
||||
// TODO: Lower DIV (with rounding/exceptions checks).
|
||||
Value *LHS = II->getArgOperand(0);
|
||||
Value *RHS = II->getArgOperand(1);
|
||||
// Extract the element as scalars.
|
||||
@ -1216,6 +1244,11 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
|
||||
|
||||
switch (II->getIntrinsicID()) {
|
||||
default: llvm_unreachable("Case stmts out of sync!");
|
||||
case Intrinsic::x86_sse_add_ss:
|
||||
case Intrinsic::x86_sse2_add_sd:
|
||||
TmpV = InsertNewInstWith(BinaryOperator::CreateFAdd(LHS, RHS,
|
||||
II->getName()), *II);
|
||||
break;
|
||||
case Intrinsic::x86_sse_sub_ss:
|
||||
case Intrinsic::x86_sse2_sub_sd:
|
||||
TmpV = InsertNewInstWith(BinaryOperator::CreateFSub(LHS, RHS,
|
||||
@ -1238,6 +1271,10 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
|
||||
}
|
||||
}
|
||||
|
||||
// If lowest element of a scalar op isn't used then use Arg0.
|
||||
if (DemandedElts.getLoBits(1) != 1)
|
||||
return II->getArgOperand(0);
|
||||
|
||||
// Output elements are undefined if both are undefined. Consider things
|
||||
// like undef&0. The result is known zero, not undef.
|
||||
UndefElts &= UndefElts2;
|
||||
|
||||
@ -5,12 +5,9 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||
define float @test_rcp_ss_0(float %a) {
|
||||
; CHECK-LABEL: @test_rcp_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> [[TMP4]])
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[TMP5]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP6]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP3]]
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -23,13 +20,7 @@ define float @test_rcp_ss_0(float %a) {
|
||||
|
||||
define float @test_rcp_ss_1(float %a) {
|
||||
; CHECK-LABEL: @test_rcp_ss_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> [[TMP4]])
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[TMP5]], i32 1
|
||||
; CHECK-NEXT: ret float [[TMP6]]
|
||||
; CHECK-NEXT: ret float 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -43,12 +34,9 @@ define float @test_rcp_ss_1(float %a) {
|
||||
define float @test_sqrt_ss_0(float %a) {
|
||||
; CHECK-LABEL: @test_sqrt_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = tail call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> [[TMP4]])
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[TMP5]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP6]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP3]]
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -61,13 +49,7 @@ define float @test_sqrt_ss_0(float %a) {
|
||||
|
||||
define float @test_sqrt_ss_2(float %a) {
|
||||
; CHECK-LABEL: @test_sqrt_ss_2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = tail call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> [[TMP4]])
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[TMP5]], i32 2
|
||||
; CHECK-NEXT: ret float [[TMP6]]
|
||||
; CHECK-NEXT: ret float 2.000000e+00
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -81,12 +63,9 @@ define float @test_sqrt_ss_2(float %a) {
|
||||
define float @test_rsqrt_ss_0(float %a) {
|
||||
; CHECK-LABEL: @test_rsqrt_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> [[TMP4]])
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[TMP5]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP6]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP3]]
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -99,13 +78,7 @@ define float @test_rsqrt_ss_0(float %a) {
|
||||
|
||||
define float @test_rsqrt_ss_3(float %a) {
|
||||
; CHECK-LABEL: @test_rsqrt_ss_3(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> [[TMP4]])
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[TMP5]], i32 3
|
||||
; CHECK-NEXT: ret float [[TMP6]]
|
||||
; CHECK-NEXT: ret float 3.000000e+00
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -130,14 +103,8 @@ define <4 x float> @test_add_ss(<4 x float> %a, <4 x float> %b) {
|
||||
|
||||
define float @test_add_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_add_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = tail call <4 x float> @llvm.x86.sse.add.ss(<4 x float> [[TMP4]], <4 x float> [[TMP5]])
|
||||
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP6]], i32 0
|
||||
; CHECK-NEXT: ret float [[R]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = fadd float %a, %b
|
||||
; CHECK-NEXT: ret float [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -154,14 +121,7 @@ define float @test_add_ss_0(float %a, float %b) {
|
||||
|
||||
define float @test_add_ss_1(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_add_ss_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = tail call <4 x float> @llvm.x86.sse.add.ss(<4 x float> [[TMP4]], <4 x float> [[TMP5]])
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x float> [[TMP6]], i32 1
|
||||
; CHECK-NEXT: ret float [[TMP7]]
|
||||
; CHECK-NEXT: ret float 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -205,9 +165,7 @@ define float @test_sub_ss_0(float %a, float %b) {
|
||||
|
||||
define float @test_sub_ss_2(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_sub_ss_2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.sub.ss(<4 x float> <float undef, float undef, float 2.000000e+00, float undef>, <4 x float> undef)
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[TMP1]], i32 2
|
||||
; CHECK-NEXT: ret float [[TMP2]]
|
||||
; CHECK-NEXT: ret float 2.000000e+00
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -251,9 +209,7 @@ define float @test_mul_ss_0(float %a, float %b) {
|
||||
|
||||
define float @test_mul_ss_3(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_mul_ss_3(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.mul.ss(<4 x float> <float undef, float undef, float undef, float 3.000000e+00>, <4 x float> undef)
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[TMP1]], i32 3
|
||||
; CHECK-NEXT: ret float [[TMP2]]
|
||||
; CHECK-NEXT: ret float 3.000000e+00
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -280,12 +236,9 @@ define <4 x float> @test_div_ss(<4 x float> %a, <4 x float> %b) {
|
||||
define float @test_div_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_div_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = tail call <4 x float> @llvm.x86.sse.div.ss(<4 x float> [[TMP4]], <4 x float> [[TMP5]])
|
||||
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP6]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse.div.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP3]], i32 0
|
||||
; CHECK-NEXT: ret float [[R]]
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
@ -303,14 +256,7 @@ define float @test_div_ss_0(float %a, float %b) {
|
||||
|
||||
define float @test_div_ss_1(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_div_ss_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = tail call <4 x float> @llvm.x86.sse.div.ss(<4 x float> [[TMP4]], <4 x float> [[TMP5]])
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x float> [[TMP6]], i32 1
|
||||
; CHECK-NEXT: ret float [[TMP7]]
|
||||
; CHECK-NEXT: ret float 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -357,9 +303,7 @@ define float @test_min_ss_0(float %a, float %b) {
|
||||
|
||||
define float @test_min_ss_2(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_min_ss_2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> <float undef, float undef, float 2.000000e+00, float undef>, <4 x float> undef)
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[TMP1]], i32 2
|
||||
; CHECK-NEXT: ret float [[TMP2]]
|
||||
; CHECK-NEXT: ret float 2.000000e+00
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -406,9 +350,7 @@ define float @test_max_ss_0(float %a, float %b) {
|
||||
|
||||
define float @test_max_ss_3(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_max_ss_3(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> <float undef, float undef, float undef, float 3.000000e+00>, <4 x float> undef)
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[TMP1]], i32 3
|
||||
; CHECK-NEXT: ret float [[TMP2]]
|
||||
; CHECK-NEXT: ret float 3.000000e+00
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -435,12 +377,9 @@ define <4 x float> @test_cmp_ss(<4 x float> %a, <4 x float> %b) {
|
||||
define float @test_cmp_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_cmp_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> [[TMP4]], <4 x float> [[TMP5]], i8 0)
|
||||
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP6]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]], i8 0)
|
||||
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP3]], i32 0
|
||||
; CHECK-NEXT: ret float [[R]]
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
@ -458,14 +397,7 @@ define float @test_cmp_ss_0(float %a, float %b) {
|
||||
|
||||
define float @test_cmp_ss_1(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_cmp_ss_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> [[TMP4]], <4 x float> [[TMP5]], i8 0)
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x float> [[TMP6]], i32 1
|
||||
; CHECK-NEXT: ret float [[TMP7]]
|
||||
; CHECK-NEXT: ret float 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
|
||||
@ -5,10 +5,9 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||
define double @test_sqrt_sd_0(double %a) {
|
||||
; CHECK-LABEL: @test_sqrt_sd_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> [[TMP2]])
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0
|
||||
; CHECK-NEXT: ret double [[TMP4]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0
|
||||
; CHECK-NEXT: ret double [[TMP3]]
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -19,11 +18,7 @@ define double @test_sqrt_sd_0(double %a) {
|
||||
|
||||
define double @test_sqrt_sd_1(double %a) {
|
||||
; CHECK-LABEL: @test_sqrt_sd_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> [[TMP2]])
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 1
|
||||
; CHECK-NEXT: ret double [[TMP4]]
|
||||
; CHECK-NEXT: ret double 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -44,12 +39,8 @@ define <2 x double> @test_add_sd(<2 x double> %a, <2 x double> %b) {
|
||||
|
||||
define double @test_add_sd_0(double %a, double %b) {
|
||||
; CHECK-LABEL: @test_add_sd_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> undef, double %b, i32 0
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> [[TMP2]], <2 x double> [[TMP3]])
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 0
|
||||
; CHECK-NEXT: ret double [[TMP5]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = fadd double %a, %b
|
||||
; CHECK-NEXT: ret double [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -62,12 +53,7 @@ define double @test_add_sd_0(double %a, double %b) {
|
||||
|
||||
define double @test_add_sd_1(double %a, double %b) {
|
||||
; CHECK-LABEL: @test_add_sd_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> undef, double %b, i32 0
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> [[TMP2]], <2 x double> [[TMP3]])
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 1
|
||||
; CHECK-NEXT: ret double [[TMP5]]
|
||||
; CHECK-NEXT: ret double 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -104,9 +90,7 @@ define double @test_sub_sd_0(double %a, double %b) {
|
||||
|
||||
define double @test_sub_sd_1(double %a, double %b) {
|
||||
; CHECK-LABEL: @test_sub_sd_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse2.sub.sd(<2 x double> <double undef, double 1.000000e+00>, <2 x double> undef)
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x double> [[TMP1]], i32 1
|
||||
; CHECK-NEXT: ret double [[TMP2]]
|
||||
; CHECK-NEXT: ret double 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -143,9 +127,7 @@ define double @test_mul_sd_0(double %a, double %b) {
|
||||
|
||||
define double @test_mul_sd_1(double %a, double %b) {
|
||||
; CHECK-LABEL: @test_mul_sd_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse2.mul.sd(<2 x double> <double undef, double 1.000000e+00>, <2 x double> undef)
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x double> [[TMP1]], i32 1
|
||||
; CHECK-NEXT: ret double [[TMP2]]
|
||||
; CHECK-NEXT: ret double 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -169,11 +151,10 @@ define <2 x double> @test_div_sd(<2 x double> %a, <2 x double> %b) {
|
||||
define double @test_div_sd_0(double %a, double %b) {
|
||||
; CHECK-LABEL: @test_div_sd_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> undef, double %b, i32 0
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = tail call <2 x double> @llvm.x86.sse2.div.sd(<2 x double> [[TMP2]], <2 x double> [[TMP3]])
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 0
|
||||
; CHECK-NEXT: ret double [[TMP5]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> undef, double %b, i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x double> @llvm.x86.sse2.div.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]])
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0
|
||||
; CHECK-NEXT: ret double [[TMP4]]
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -186,12 +167,7 @@ define double @test_div_sd_0(double %a, double %b) {
|
||||
|
||||
define double @test_div_sd_1(double %a, double %b) {
|
||||
; CHECK-LABEL: @test_div_sd_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> undef, double %b, i32 0
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = tail call <2 x double> @llvm.x86.sse2.div.sd(<2 x double> [[TMP2]], <2 x double> [[TMP3]])
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 1
|
||||
; CHECK-NEXT: ret double [[TMP5]]
|
||||
; CHECK-NEXT: ret double 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -231,9 +207,7 @@ define double @test_min_sd_0(double %a, double %b) {
|
||||
|
||||
define double @test_min_sd_1(double %a, double %b) {
|
||||
; CHECK-LABEL: @test_min_sd_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> <double undef, double 1.000000e+00>, <2 x double> undef)
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x double> [[TMP1]], i32 1
|
||||
; CHECK-NEXT: ret double [[TMP2]]
|
||||
; CHECK-NEXT: ret double 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -273,9 +247,7 @@ define double @test_max_sd_0(double %a, double %b) {
|
||||
|
||||
define double @test_max_sd_1(double %a, double %b) {
|
||||
; CHECK-LABEL: @test_max_sd_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> <double undef, double 1.000000e+00>, <2 x double> undef)
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x double> [[TMP1]], i32 1
|
||||
; CHECK-NEXT: ret double [[TMP2]]
|
||||
; CHECK-NEXT: ret double 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -299,11 +271,10 @@ define <2 x double> @test_cmp_sd(<2 x double> %a, <2 x double> %b) {
|
||||
define double @test_cmp_sd_0(double %a, double %b) {
|
||||
; CHECK-LABEL: @test_cmp_sd_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> undef, double %b, i32 0
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[TMP2]], <2 x double> [[TMP3]], i8 0)
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 0
|
||||
; CHECK-NEXT: ret double [[TMP5]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> undef, double %b, i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]], i8 0)
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0
|
||||
; CHECK-NEXT: ret double [[TMP4]]
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -316,12 +287,7 @@ define double @test_cmp_sd_0(double %a, double %b) {
|
||||
|
||||
define double @test_cmp_sd_1(double %a, double %b) {
|
||||
; CHECK-LABEL: @test_cmp_sd_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> undef, double %b, i32 0
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[TMP2]], <2 x double> [[TMP3]], i8 0)
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 1
|
||||
; CHECK-NEXT: ret double [[TMP5]]
|
||||
; CHECK-NEXT: ret double 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
|
||||
@ -16,7 +16,7 @@ define <2 x double> @test_round_sd(<2 x double> %a, <2 x double> %b) {
|
||||
define double @test_round_sd_0(double %a, double %b) {
|
||||
; CHECK-LABEL: @test_round_sd_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %b, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> <double undef, double 1.000000e+00>, <2 x double> [[TMP1]], i32 10)
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> undef, <2 x double> [[TMP1]], i32 10)
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0
|
||||
; CHECK-NEXT: ret double [[TMP3]]
|
||||
;
|
||||
@ -31,10 +31,7 @@ define double @test_round_sd_0(double %a, double %b) {
|
||||
|
||||
define double @test_round_sd_1(double %a, double %b) {
|
||||
; CHECK-LABEL: @test_round_sd_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %b, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> <double undef, double 1.000000e+00>, <2 x double> [[TMP1]], i32 10)
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 1
|
||||
; CHECK-NEXT: ret double [[TMP3]]
|
||||
; CHECK-NEXT: ret double 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -63,7 +60,7 @@ define <4 x float> @test_round_ss(<4 x float> %a, <4 x float> %b) {
|
||||
define float @test_round_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_round_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> <float undef, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, <4 x float> [[TMP1]], i32 10)
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> undef, <4 x float> [[TMP1]], i32 10)
|
||||
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
|
||||
; CHECK-NEXT: ret float [[R]]
|
||||
;
|
||||
@ -82,10 +79,7 @@ define float @test_round_ss_0(float %a, float %b) {
|
||||
|
||||
define float @test_round_ss_2(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_round_ss_2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> <float undef, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, <4 x float> [[TMP1]], i32 10)
|
||||
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP2]], i32 2
|
||||
; CHECK-NEXT: ret float [[R]]
|
||||
; CHECK-NEXT: ret float 2.000000e+00
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
|
||||
@ -4,10 +4,9 @@
|
||||
define double @test_vfrcz_sd_0(double %a) {
|
||||
; CHECK-LABEL: @test_vfrcz_sd_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x double> @llvm.x86.xop.vfrcz.sd(<2 x double> [[TMP2]])
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0
|
||||
; CHECK-NEXT: ret double [[TMP4]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.xop.vfrcz.sd(<2 x double> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0
|
||||
; CHECK-NEXT: ret double [[TMP3]]
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -18,11 +17,7 @@ define double @test_vfrcz_sd_0(double %a) {
|
||||
|
||||
define double @test_vfrcz_sd_1(double %a) {
|
||||
; CHECK-LABEL: @test_vfrcz_sd_1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x double> @llvm.x86.xop.vfrcz.sd(<2 x double> [[TMP2]])
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 1
|
||||
; CHECK-NEXT: ret double [[TMP4]]
|
||||
; CHECK-NEXT: ret double 1.000000e+00
|
||||
;
|
||||
%1 = insertelement <2 x double> undef, double %a, i32 0
|
||||
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
|
||||
@ -34,12 +29,9 @@ define double @test_vfrcz_sd_1(double %a) {
|
||||
define float @test_vfrcz_ss_0(float %a) {
|
||||
; CHECK-LABEL: @test_vfrcz_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = tail call <4 x float> @llvm.x86.xop.vfrcz.ss(<4 x float> [[TMP4]])
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[TMP5]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP6]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.xop.vfrcz.ss(<4 x float> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP3]]
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
@ -52,13 +44,7 @@ define float @test_vfrcz_ss_0(float %a) {
|
||||
|
||||
define float @test_vfrcz_ss_3(float %a) {
|
||||
; CHECK-LABEL: @test_vfrcz_ss_3(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 1.000000e+00, i32 1
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float 2.000000e+00, i32 2
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float 3.000000e+00, i32 3
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = tail call <4 x float> @llvm.x86.xop.vfrcz.ss(<4 x float> [[TMP4]])
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[TMP5]], i32 3
|
||||
; CHECK-NEXT: ret float [[TMP6]]
|
||||
; CHECK-NEXT: ret float 3.000000e+00
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
|
||||
|
||||
Loading…
Reference in New Issue
Block a user