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CostModel: Change the default target-independent implementation for finding
the cost of arithmetic functions. We now assume that the cost of arithmetic operations that are marked as Legal or Promote is low, but ops that are marked as custom are higher. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171002 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -413,6 +413,15 @@ public:
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getOperationAction(Op, VT) == Custom);
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}
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/// isOperationLegalOrPromote - Return true if the specified operation is
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/// legal on this target or can be made legal using promotion. This
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/// is used to help guide high-level lowering decisions.
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bool isOperationLegalOrPromote(unsigned Op, EVT VT) const {
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return (VT == MVT::Other || isTypeLegal(VT)) &&
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(getOperationAction(Op, VT) == Legal ||
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getOperationAction(Op, VT) == Promote);
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}
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/// isOperationExpand - Return true if the specified operation is illegal on
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/// this target or unlikely to be made legal with custom lowering. This is
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/// used to help guide high-level lowering decisions.
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@ -179,12 +179,22 @@ unsigned VectorTargetTransformImpl::getArithmeticInstrCost(unsigned Opcode,
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std::pair<unsigned, MVT> LT = getTypeLegalizationCost(Ty);
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if (!TLI->isOperationExpand(ISD, LT.second)) {
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// The operation is legal. Assume it costs 1. Multiply
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// by the type-legalization overhead.
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if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
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// The operation is legal. Assume it costs 1.
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// If the type is split to multiple registers, assume that thre is some
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// overhead to this.
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// TODO: Once we have extract/insert subvector cost we need to use them.
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if (LT.first > 1)
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return LT.first * 2;
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return LT.first * 1;
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}
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if (!TLI->isOperationExpand(ISD, LT.second)) {
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// If the operation is custom lowered then assume
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// thare the code is twice as expensive.
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return LT.first * 2;
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}
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// Else, assume that we need to scalarize this op.
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if (Ty->isVectorTy()) {
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unsigned Num = Ty->getVectorNumElements();
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@ -9,9 +9,9 @@ target triple = "x86_64-apple-macosx10.8.0"
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; Select VF = 8;
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;CHECK: @example1
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;CHECK: load <8 x i32>
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;CHECK: add nsw <8 x i32>
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;CHECK: store <8 x i32>
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;CHECK: load <4 x i32>
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;CHECK: add nsw <4 x i32>
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;CHECK: store <4 x i32>
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;CHECK: ret void
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define void @example1() nounwind uwtable ssp {
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br label %1
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