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It's not safe to coalesce a move where src and dst registers have different subregister indices. e.g.:
%reg16404:1<def> = MOV8rr %reg16412:2<kill> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91061 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1317,7 +1317,13 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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"coalesced to another register.\n");
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return false; // Not coalescable.
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}
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} else if (!tii_->isMoveInstr(*CopyMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)){
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} else if (tii_->isMoveInstr(*CopyMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)) {
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if (SrcSubIdx && DstSubIdx && SrcSubIdx != DstSubIdx) {
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// e.g. %reg16404:1<def> = MOV8rr %reg16412:2<kill>
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Again = true;
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return false; // Not coalescable.
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}
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} else {
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llvm_unreachable("Unrecognized copy instruction!");
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}
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40
test/CodeGen/X86/2009-12-12-CoalescerBug.ll
Normal file
40
test/CodeGen/X86/2009-12-12-CoalescerBug.ll
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@ -0,0 +1,40 @@
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; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
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define i32 @do_loop(i32* nocapture %sdp, i32* nocapture %ddp, i8* %mdp, i8* nocapture %cdp, i32 %w) nounwind readonly optsize ssp {
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entry:
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br label %bb
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bb: ; preds = %bb5, %entry
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%mask.1.in = load i8* undef, align 1 ; <i8> [#uses=3]
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%0 = icmp eq i8 %mask.1.in, 0 ; <i1> [#uses=1]
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br i1 %0, label %bb5, label %bb1
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bb1: ; preds = %bb
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br i1 undef, label %bb2, label %bb3
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bb2: ; preds = %bb1
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; CHECK: %bb2
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; CHECK: movb %ch, %al
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%1 = zext i8 %mask.1.in to i32 ; <i32> [#uses=1]
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%2 = zext i8 undef to i32 ; <i32> [#uses=1]
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%3 = mul i32 %2, %1 ; <i32> [#uses=1]
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%4 = add i32 %3, 1 ; <i32> [#uses=1]
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%5 = add i32 %4, 0 ; <i32> [#uses=1]
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%6 = lshr i32 %5, 8 ; <i32> [#uses=1]
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%retval12.i = trunc i32 %6 to i8 ; <i8> [#uses=1]
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br label %bb3
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bb3: ; preds = %bb2, %bb1
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%mask.0.in = phi i8 [ %retval12.i, %bb2 ], [ %mask.1.in, %bb1 ] ; <i8> [#uses=1]
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%7 = icmp eq i8 %mask.0.in, 0 ; <i1> [#uses=1]
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br i1 %7, label %bb5, label %bb4
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bb4: ; preds = %bb3
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br label %bb5
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bb5: ; preds = %bb4, %bb3, %bb
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br i1 undef, label %bb6, label %bb
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bb6: ; preds = %bb5
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ret i32 undef
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}
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