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[X86][SLP] Show example of failure to uniformly commute splats for 'alt' shuffles.
If either the main/alt opcodes isn't commutable we may end up with the splats not correctly commuted to the same side. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356837 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -533,3 +533,41 @@ define <8 x i32> @sdiv_v8i32_undefs(<8 x i32> %a) {
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%r7 = insertelement <8 x i32> %r6, i32 %ab7, i32 7
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ret <8 x i32> %r7
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}
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define <8 x i32> @add_sub_v8i32_splat(<8 x i32> %a, i32 %b) {
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; CHECK-LABEL: @add_sub_v8i32_splat(
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> undef, i32 [[B:%.*]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x i32> [[A:%.*]], <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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; CHECK-NEXT: [[TMP4:%.*]] = add <4 x i32> [[TMP2]], [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: [[TMP6:%.*]] = sub <4 x i32> [[TMP2]], [[TMP5]]
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; CHECK-NEXT: [[R7:%.*]] = shufflevector <4 x i32> [[TMP4]], <4 x i32> [[TMP6]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: ret <8 x i32> [[R7]]
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;
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%a0 = extractelement <8 x i32> %a, i32 0
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%a1 = extractelement <8 x i32> %a, i32 1
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%a2 = extractelement <8 x i32> %a, i32 2
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%a3 = extractelement <8 x i32> %a, i32 3
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%a4 = extractelement <8 x i32> %a, i32 4
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%a5 = extractelement <8 x i32> %a, i32 5
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%a6 = extractelement <8 x i32> %a, i32 6
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%a7 = extractelement <8 x i32> %a, i32 7
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%ab0 = add i32 %a0, %b
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%ab1 = add i32 %b, %a1
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%ab2 = add i32 %a2, %b
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%ab3 = add i32 %b, %a3
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%ab4 = sub i32 %b, %a4
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%ab5 = sub i32 %b, %a5
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%ab6 = sub i32 %b, %a6
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%ab7 = sub i32 %b, %a7
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%r0 = insertelement <8 x i32> undef, i32 %ab0, i32 0
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%r1 = insertelement <8 x i32> %r0, i32 %ab1, i32 1
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%r2 = insertelement <8 x i32> %r1, i32 %ab2, i32 2
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%r3 = insertelement <8 x i32> %r2, i32 %ab3, i32 3
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%r4 = insertelement <8 x i32> %r3, i32 %ab4, i32 4
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%r5 = insertelement <8 x i32> %r4, i32 %ab5, i32 5
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%r6 = insertelement <8 x i32> %r5, i32 %ab6, i32 6
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%r7 = insertelement <8 x i32> %r6, i32 %ab7, i32 7
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ret <8 x i32> %r7
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}
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