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allow a virtual register to be associated with live-in values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21927 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -108,7 +108,10 @@ class MachineFunction : private Annotation {
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/// LiveIns/LiveOuts - Keep track of the physical registers that are
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/// LiveIns/LiveOuts - Keep track of the physical registers that are
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/// livein/liveout of the function. Live in values are typically arguments in
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/// livein/liveout of the function. Live in values are typically arguments in
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/// registers, live out values are typically return values in registers.
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/// registers, live out values are typically return values in registers.
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std::vector<unsigned> LiveIns, LiveOuts;
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/// LiveIn values are allowed to have virtual registers associated with them,
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/// stored in the second element.
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std::vector<std::pair<unsigned, unsigned> > LiveIns;
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std::vector<unsigned> LiveOuts;
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public:
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public:
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MachineFunction(const Function *Fn, const TargetMachine &TM);
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MachineFunction(const Function *Fn, const TargetMachine &TM);
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@ -177,16 +180,20 @@ public:
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/// addLiveIn/Out - Add the specified register as a live in/out. Note that it
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/// addLiveIn/Out - Add the specified register as a live in/out. Note that it
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/// is an error to add the same register to the same set more than once.
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/// is an error to add the same register to the same set more than once.
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void addLiveIn(unsigned Reg) { LiveIns.push_back(Reg); }
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void addLiveIn(unsigned Reg, unsigned vreg = 0) {
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LiveIns.push_back(std::make_pair(Reg, vreg));
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}
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void addLiveOut(unsigned Reg) { LiveOuts.push_back(Reg); }
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void addLiveOut(unsigned Reg) { LiveOuts.push_back(Reg); }
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// Iteration support for live in/out sets. These sets are kept in sorted
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// Iteration support for live in/out sets. These sets are kept in sorted
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// order by their register number.
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// order by their register number.
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typedef std::vector<unsigned>::const_iterator liveinout_iterator;
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typedef std::vector<std::pair<unsigned,unsigned> >::const_iterator
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liveinout_iterator livein_begin() const { return LiveIns.begin(); }
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livein_iterator;
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liveinout_iterator livein_end() const { return LiveIns.end(); }
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typedef std::vector<unsigned>::const_iterator liveout_iterator;
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liveinout_iterator liveout_begin() const { return LiveOuts.begin(); }
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livein_iterator livein_begin() const { return LiveIns.begin(); }
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liveinout_iterator liveout_end() const { return LiveOuts.end(); }
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livein_iterator livein_end() const { return LiveIns.end(); }
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liveout_iterator liveout_begin() const { return LiveOuts.begin(); }
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liveout_iterator liveout_end() const { return LiveOuts.end(); }
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/// getBlockNumbered - MachineBasicBlocks are automatically numbered when they
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/// getBlockNumbered - MachineBasicBlocks are automatically numbered when they
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/// are inserted into the machine function. The block number for a machine
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/// are inserted into the machine function. The block number for a machine
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@ -95,7 +95,7 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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// beginning of the function that we will pretend "defines" the values. This
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// beginning of the function that we will pretend "defines" the values. This
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// is to make the interval analysis simpler by providing a number.
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// is to make the interval analysis simpler by providing a number.
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if (fn.livein_begin() != fn.livein_end()) {
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if (fn.livein_begin() != fn.livein_end()) {
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unsigned FirstLiveIn = *fn.livein_begin();
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unsigned FirstLiveIn = fn.livein_begin()->first;
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// Find a reg class that contains this live in.
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// Find a reg class that contains this live in.
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const TargetRegisterClass *RC = 0;
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const TargetRegisterClass *RC = 0;
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@ -128,11 +128,11 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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// Note intervals due to live-in values.
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// Note intervals due to live-in values.
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if (fn.livein_begin() != fn.livein_end()) {
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if (fn.livein_begin() != fn.livein_end()) {
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MachineBasicBlock *Entry = fn.begin();
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MachineBasicBlock *Entry = fn.begin();
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for (MachineFunction::liveinout_iterator I = fn.livein_begin(),
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for (MachineFunction::livein_iterator I = fn.livein_begin(),
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E = fn.livein_end(); I != E; ++I) {
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E = fn.livein_end(); I != E; ++I) {
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handlePhysicalRegisterDef(Entry, Entry->begin(),
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handlePhysicalRegisterDef(Entry, Entry->begin(),
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getOrCreateInterval(*I), 0, 0);
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getOrCreateInterval(I->first), 0, 0);
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for (const unsigned* AS = mri_->getAliasSet(*I); *AS; ++AS)
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for (const unsigned* AS = mri_->getAliasSet(I->first); *AS; ++AS)
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handlePhysicalRegisterDef(Entry, Entry->begin(),
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handlePhysicalRegisterDef(Entry, Entry->begin(),
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getOrCreateInterval(*AS), 0, 0);
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getOrCreateInterval(*AS), 0, 0);
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}
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}
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@ -165,11 +165,11 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
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VirtRegInfo.resize(64);
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VirtRegInfo.resize(64);
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// Mark live-in registers as live-in.
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// Mark live-in registers as live-in.
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for (MachineFunction::liveinout_iterator I = MF.livein_begin(),
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for (MachineFunction::livein_iterator I = MF.livein_begin(),
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E = MF.livein_end(); I != E; ++I) {
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E = MF.livein_end(); I != E; ++I) {
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assert(MRegisterInfo::isPhysicalRegister(*I) &&
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assert(MRegisterInfo::isPhysicalRegister(I->first) &&
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"Cannot have a live-in virtual register!");
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"Cannot have a live-in virtual register!");
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HandlePhysRegDef(*I, 0);
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HandlePhysRegDef(I->first, 0);
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}
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}
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// Calculate live variable information in depth first order on the CFG of the
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// Calculate live variable information in depth first order on the CFG of the
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@ -272,7 +272,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
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// it as using all of the live-out values in the function.
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// it as using all of the live-out values in the function.
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if (!MBB->empty() && TII.isReturn(MBB->back().getOpcode())) {
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if (!MBB->empty() && TII.isReturn(MBB->back().getOpcode())) {
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MachineInstr *Ret = &MBB->back();
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MachineInstr *Ret = &MBB->back();
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for (MachineFunction::liveinout_iterator I = MF.liveout_begin(),
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for (MachineFunction::liveout_iterator I = MF.liveout_begin(),
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E = MF.liveout_end(); I != E; ++I) {
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E = MF.liveout_end(); I != E; ++I) {
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assert(MRegisterInfo::isPhysicalRegister(*I) &&
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assert(MRegisterInfo::isPhysicalRegister(*I) &&
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"Cannot have a live-in virtual register!");
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"Cannot have a live-in virtual register!");
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