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FIXME no longer applies. R12 and R3 are available for allocation

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84977 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2009-10-23 23:07:42 +00:00
parent 23e5fcfec4
commit 7388037dd1
1 changed files with 0 additions and 3 deletions
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3
lib/Target/ARM/ARMRegisterInfo.td
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@ -129,9 +129,6 @@ def GPR : RegisterClass<"ARM", [i32], 32, [R0, R1, R2, R3, R4, R5, R6,
iterator allocation_order_begin(const MachineFunction &MF) const;
iterator allocation_order_end(const MachineFunction &MF) const;
}];
// FIXME: We are reserving r12 in case the PEI needs to use it to
// generate large stack offset. Make it available once we have register
// scavenging. Similarly r3 is reserved in Thumb mode for now.
let MethodBodies = [{
// FP is R11, R9 is available.
static const unsigned ARM_GPR_AO_1[] = {