mirror of
https://github.com/RPCS3/llvm.git
synced 2025-04-06 15:21:37 +00:00
Build Blackfin target with autoconf and cmake.
Note that configure was edited by hand. Will somebody with the correct version of autoconf please regenerate? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77898 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
d950941e13
commit
73b7bb7b07
@ -49,6 +49,7 @@ endif()
|
|||||||
set(LLVM_ALL_TARGETS
|
set(LLVM_ALL_TARGETS
|
||||||
Alpha
|
Alpha
|
||||||
ARM
|
ARM
|
||||||
|
Blackfin
|
||||||
CBackend
|
CBackend
|
||||||
CellSPU
|
CellSPU
|
||||||
CppBackend
|
CppBackend
|
||||||
|
@ -227,6 +227,7 @@ AC_CACHE_CHECK([target architecture],[llvm_cv_target_arch],
|
|||||||
xcore-*) llvm_cv_target_arch="XCore" ;;
|
xcore-*) llvm_cv_target_arch="XCore" ;;
|
||||||
msp430-*) llvm_cv_target_arch="MSP430" ;;
|
msp430-*) llvm_cv_target_arch="MSP430" ;;
|
||||||
s390x-*) llvm_cv_target_arch="SystemZ" ;;
|
s390x-*) llvm_cv_target_arch="SystemZ" ;;
|
||||||
|
bfin-*) llvm_cv_target_arch="Blackfin" ;;
|
||||||
*) llvm_cv_target_arch="Unknown" ;;
|
*) llvm_cv_target_arch="Unknown" ;;
|
||||||
esac])
|
esac])
|
||||||
|
|
||||||
@ -341,18 +342,19 @@ then
|
|||||||
AC_SUBST(JIT,[[]])
|
AC_SUBST(JIT,[[]])
|
||||||
else
|
else
|
||||||
case "$llvm_cv_target_arch" in
|
case "$llvm_cv_target_arch" in
|
||||||
x86) AC_SUBST(TARGET_HAS_JIT,1) ;;
|
x86) AC_SUBST(TARGET_HAS_JIT,1) ;;
|
||||||
Sparc) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
Sparc) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
||||||
PowerPC) AC_SUBST(TARGET_HAS_JIT,1) ;;
|
PowerPC) AC_SUBST(TARGET_HAS_JIT,1) ;;
|
||||||
x86_64) AC_SUBST(TARGET_HAS_JIT,1) ;;
|
x86_64) AC_SUBST(TARGET_HAS_JIT,1) ;;
|
||||||
Alpha) AC_SUBST(TARGET_HAS_JIT,1) ;;
|
Alpha) AC_SUBST(TARGET_HAS_JIT,1) ;;
|
||||||
ARM) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
ARM) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
||||||
Mips) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
Mips) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
||||||
PIC16) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
PIC16) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
||||||
XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
||||||
MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
||||||
SystemZ) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
SystemZ) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
||||||
*) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
Blackfin) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
||||||
|
*) AC_SUBST(TARGET_HAS_JIT,0) ;;
|
||||||
esac
|
esac
|
||||||
fi
|
fi
|
||||||
|
|
||||||
@ -401,41 +403,43 @@ AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets],
|
|||||||
[Build specific host targets: all,host-only,{target-name} (default=all)]),,
|
[Build specific host targets: all,host-only,{target-name} (default=all)]),,
|
||||||
enableval=all)
|
enableval=all)
|
||||||
case "$enableval" in
|
case "$enableval" in
|
||||||
all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ CBackend MSIL CppBackend" ;;
|
all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend MSIL CppBackend" ;;
|
||||||
host-only)
|
host-only)
|
||||||
case "$llvm_cv_target_arch" in
|
case "$llvm_cv_target_arch" in
|
||||||
x86) TARGETS_TO_BUILD="X86" ;;
|
x86) TARGETS_TO_BUILD="X86" ;;
|
||||||
x86_64) TARGETS_TO_BUILD="X86" ;;
|
x86_64) TARGETS_TO_BUILD="X86" ;;
|
||||||
Sparc) TARGETS_TO_BUILD="Sparc" ;;
|
Sparc) TARGETS_TO_BUILD="Sparc" ;;
|
||||||
PowerPC) TARGETS_TO_BUILD="PowerPC" ;;
|
PowerPC) TARGETS_TO_BUILD="PowerPC" ;;
|
||||||
Alpha) TARGETS_TO_BUILD="Alpha" ;;
|
Alpha) TARGETS_TO_BUILD="Alpha" ;;
|
||||||
ARM) TARGETS_TO_BUILD="ARM" ;;
|
ARM) TARGETS_TO_BUILD="ARM" ;;
|
||||||
Mips) TARGETS_TO_BUILD="Mips" ;;
|
Mips) TARGETS_TO_BUILD="Mips" ;;
|
||||||
CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;;
|
CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;;
|
||||||
PIC16) TARGETS_TO_BUILD="PIC16" ;;
|
PIC16) TARGETS_TO_BUILD="PIC16" ;;
|
||||||
XCore) TARGETS_TO_BUILD="XCore" ;;
|
XCore) TARGETS_TO_BUILD="XCore" ;;
|
||||||
MSP430) TARGETS_TO_BUILD="MSP430" ;;
|
MSP430) TARGETS_TO_BUILD="MSP430" ;;
|
||||||
SystemZ) TARGETS_TO_BUILD="SystemZ" ;;
|
SystemZ) TARGETS_TO_BUILD="SystemZ" ;;
|
||||||
|
Blackfin) TARGETS_TO_BUILD="Blackfin" ;;
|
||||||
*) AC_MSG_ERROR([Can not set target to build]) ;;
|
*) AC_MSG_ERROR([Can not set target to build]) ;;
|
||||||
esac
|
esac
|
||||||
;;
|
;;
|
||||||
*)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
|
*)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
|
||||||
case "$a_target" in
|
case "$a_target" in
|
||||||
x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
|
x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
|
||||||
x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
|
x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
|
||||||
sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;;
|
sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;;
|
||||||
powerpc) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
|
powerpc) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
|
||||||
alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;;
|
alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;;
|
||||||
arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
|
arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
|
||||||
mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
|
mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
|
||||||
spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
|
spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
|
||||||
pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
|
pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
|
||||||
xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
|
xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
|
||||||
msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
|
msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
|
||||||
systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
|
systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
|
||||||
cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
|
blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;;
|
||||||
msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
|
cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
|
||||||
cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
|
msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
|
||||||
|
cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
|
||||||
*) AC_MSG_ERROR([Unrecognized target $a_target]) ;;
|
*) AC_MSG_ERROR([Unrecognized target $a_target]) ;;
|
||||||
esac
|
esac
|
||||||
done
|
done
|
||||||
|
2
configure
vendored
2
configure
vendored
@ -4935,7 +4935,7 @@ else
|
|||||||
fi
|
fi
|
||||||
|
|
||||||
case "$enableval" in
|
case "$enableval" in
|
||||||
all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ CBackend MSIL CppBackend" ;;
|
all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend MSIL CppBackend" ;;
|
||||||
host-only)
|
host-only)
|
||||||
case "$llvm_cv_target_arch" in
|
case "$llvm_cv_target_arch" in
|
||||||
x86) TARGETS_TO_BUILD="X86" ;;
|
x86) TARGETS_TO_BUILD="X86" ;;
|
||||||
|
Loading…
x
Reference in New Issue
Block a user