Emit ARM EHABI unwinding instructions for 3 more Thumb instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148473 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evgeniy Stepanov 2012-01-19 12:53:06 +00:00
parent 40385c8104
commit 73dd8bbce3
2 changed files with 18 additions and 0 deletions

View File

@ -1107,6 +1107,7 @@ void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) {
break;
case ARM::STR_PRE_IMM:
case ARM::STR_PRE_REG:
case ARM::t2STR_PRE:
assert(MI->getOperand(2).getReg() == ARM::SP &&
"Only stack pointer as a source reg is supported");
RegList.push_back(SrcReg);
@ -1122,12 +1123,14 @@ void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) {
MI->dump();
assert(0 && "Unsupported opcode for unwinding information");
case ARM::MOVr:
case ARM::tMOVr:
Offset = 0;
break;
case ARM::ADDri:
Offset = -MI->getOperand(2).getImm();
break;
case ARM::SUBri:
case ARM::t2SUBri:
Offset = MI->getOperand(2).getImm();
break;
case ARM::tSUBspi:

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@ -0,0 +1,15 @@
; Test that the EHABI unwind instruction generator does not encounter any
; unfamiliar instructions.
; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi -disable-fp-elim
; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi
define void @_Z1fv() nounwind {
entry:
ret void
}
define void @_Z1gv() nounwind {
entry:
call void @_Z1fv()
ret void
}