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AsmParser: Reformat the MS asm parser to reduce nesting.
While there postpone register name printing after uniquing. No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175292 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer
parent
86cdbc9c29
commit
7523437246
@ -3998,7 +3998,8 @@ bool AsmParser::ParseDirectiveEndr(SMLoc DirectiveLoc) {
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return false;
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}
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bool AsmParser::ParseDirectiveMSEmit(SMLoc IDLoc, ParseStatementInfo &Info, size_t Len) {
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bool AsmParser::ParseDirectiveMSEmit(SMLoc IDLoc, ParseStatementInfo &Info,
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size_t Len) {
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const MCExpr *Value;
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SMLoc ExprLoc = getLexer().getLoc();
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if (ParseExpression(Value))
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@ -4026,15 +4027,16 @@ bool AsmParser::ParseDirectiveMSAlign(SMLoc IDLoc, ParseStatementInfo &Info) {
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if (!isPowerOf2_64(IntValue))
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return Error(ExprLoc, "literal value not a power of two greater then zero");
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Info.AsmRewrites->push_back(AsmRewrite(AOK_Align, IDLoc, 5, Log2_64(IntValue)));
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Info.AsmRewrites->push_back(AsmRewrite(AOK_Align, IDLoc, 5,
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Log2_64(IntValue)));
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return false;
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}
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// We are comparing pointers, but the pointers are relative to a single string.
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// Thus, this should always be deterministic.
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static int RewritesSort (const void *A, const void *B) {
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const AsmRewrite *AsmRewriteA = static_cast<const AsmRewrite*>(A);
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const AsmRewrite *AsmRewriteB = static_cast<const AsmRewrite*>(B);
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static int RewritesSort(const void *A, const void *B) {
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const AsmRewrite *AsmRewriteA = static_cast<const AsmRewrite *>(A);
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const AsmRewrite *AsmRewriteB = static_cast<const AsmRewrite *>(B);
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if (AsmRewriteA->Loc.getPointer() < AsmRewriteB->Loc.getPointer())
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return -1;
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if (AsmRewriteB->Loc.getPointer() < AsmRewriteA->Loc.getPointer())
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@ -4042,23 +4044,24 @@ static int RewritesSort (const void *A, const void *B) {
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return 0;
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}
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bool AsmParser::ParseMSInlineAsm(void *AsmLoc, std::string &AsmString,
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unsigned &NumOutputs, unsigned &NumInputs,
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SmallVectorImpl<std::pair<void *, bool> > &OpDecls,
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SmallVectorImpl<std::string> &Constraints,
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SmallVectorImpl<std::string> &Clobbers,
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const MCInstrInfo *MII,
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const MCInstPrinter *IP,
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MCAsmParserSemaCallback &SI) {
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bool
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AsmParser::ParseMSInlineAsm(void *AsmLoc, std::string &AsmString,
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unsigned &NumOutputs, unsigned &NumInputs,
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SmallVectorImpl<std::pair<void *, bool> > &OpDecls,
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SmallVectorImpl<std::string> &Constraints,
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SmallVectorImpl<std::string> &Clobbers,
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const MCInstrInfo *MII,
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const MCInstPrinter *IP,
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MCAsmParserSemaCallback &SI) {
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SmallVector<void *, 4> InputDecls;
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SmallVector<void *, 4> OutputDecls;
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SmallVector<bool, 4> InputDeclsAddressOf;
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SmallVector<bool, 4> OutputDeclsAddressOf;
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SmallVector<std::string, 4> InputConstraints;
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SmallVector<std::string, 4> OutputConstraints;
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std::set<std::string> ClobberRegs;
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SmallVector<unsigned, 4> ClobberRegs;
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SmallVector<struct AsmRewrite, 4> AsmStrRewrites;
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SmallVector<AsmRewrite, 4> AsmStrRewrites;
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// Prime the lexer.
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Lex();
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@ -4074,65 +4077,60 @@ bool AsmParser::ParseMSInlineAsm(void *AsmLoc, std::string &AsmString,
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if (Info.ParseError)
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return true;
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if (Info.Opcode != ~0U) {
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const MCInstrDesc &Desc = MII->get(Info.Opcode);
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if (Info.Opcode == ~0U)
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continue;
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// Build the list of clobbers, outputs and inputs.
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for (unsigned i = 1, e = Info.ParsedOperands.size(); i != e; ++i) {
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MCParsedAsmOperand *Operand = Info.ParsedOperands[i];
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const MCInstrDesc &Desc = MII->get(Info.Opcode);
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// Immediate.
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if (Operand->isImm()) {
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if (Operand->needAsmRewrite())
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AsmStrRewrites.push_back(AsmRewrite(AOK_ImmPrefix,
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Operand->getStartLoc()));
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continue;
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}
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// Build the list of clobbers, outputs and inputs.
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for (unsigned i = 1, e = Info.ParsedOperands.size(); i != e; ++i) {
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MCParsedAsmOperand *Operand = Info.ParsedOperands[i];
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// Register operand.
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if (Operand->isReg() && !Operand->needAddressOf()) {
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unsigned NumDefs = Desc.getNumDefs();
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// Clobber.
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if (NumDefs && Operand->getMCOperandNum() < NumDefs) {
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std::string Reg;
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raw_string_ostream OS(Reg);
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IP->printRegName(OS, Operand->getReg());
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ClobberRegs.insert(StringRef(OS.str()));
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}
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continue;
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}
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// Immediate.
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if (Operand->isImm()) {
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if (Operand->needAsmRewrite())
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AsmStrRewrites.push_back(AsmRewrite(AOK_ImmPrefix,
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Operand->getStartLoc()));
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continue;
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}
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// Expr/Input or Output.
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bool IsVarDecl;
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unsigned Length, Size, Type;
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void *OpDecl = SI.LookupInlineAsmIdentifier(Operand->getName(), AsmLoc,
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Length, Size, Type, IsVarDecl);
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if (OpDecl) {
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bool isOutput = (i == 1) && Desc.mayStore();
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if (Operand->isMem() && Operand->needSizeDirective())
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AsmStrRewrites.push_back(AsmRewrite(AOK_SizeDirective,
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Operand->getStartLoc(),
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/*Len*/0,
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Operand->getMemSize()));
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if (isOutput) {
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std::string Constraint = "=";
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++InputIdx;
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OutputDecls.push_back(OpDecl);
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OutputDeclsAddressOf.push_back(Operand->needAddressOf());
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Constraint += Operand->getConstraint().str();
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OutputConstraints.push_back(Constraint);
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AsmStrRewrites.push_back(AsmRewrite(AOK_Output,
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Operand->getStartLoc(),
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Operand->getNameLen()));
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} else {
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InputDecls.push_back(OpDecl);
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InputDeclsAddressOf.push_back(Operand->needAddressOf());
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InputConstraints.push_back(Operand->getConstraint().str());
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AsmStrRewrites.push_back(AsmRewrite(AOK_Input,
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Operand->getStartLoc(),
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Operand->getNameLen()));
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}
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}
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// Register operand.
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if (Operand->isReg() && !Operand->needAddressOf()) {
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unsigned NumDefs = Desc.getNumDefs();
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// Clobber.
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if (NumDefs && Operand->getMCOperandNum() < NumDefs)
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ClobberRegs.push_back(Operand->getReg());
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continue;
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}
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// Expr/Input or Output.
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bool IsVarDecl;
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unsigned Length, Size, Type;
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void *OpDecl = SI.LookupInlineAsmIdentifier(Operand->getName(), AsmLoc,
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Length, Size, Type,
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IsVarDecl);
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if (!OpDecl)
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continue;
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bool isOutput = (i == 1) && Desc.mayStore();
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if (Operand->isMem() && Operand->needSizeDirective())
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AsmStrRewrites.push_back(AsmRewrite(AOK_SizeDirective,
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Operand->getStartLoc(), /*Len*/0,
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Operand->getMemSize()));
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if (isOutput) {
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++InputIdx;
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OutputDecls.push_back(OpDecl);
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OutputDeclsAddressOf.push_back(Operand->needAddressOf());
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OutputConstraints.push_back('=' + Operand->getConstraint().str());
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AsmStrRewrites.push_back(AsmRewrite(AOK_Output, Operand->getStartLoc(),
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Operand->getNameLen()));
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} else {
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InputDecls.push_back(OpDecl);
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InputDeclsAddressOf.push_back(Operand->needAddressOf());
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InputConstraints.push_back(Operand->getConstraint().str());
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AsmStrRewrites.push_back(AsmRewrite(AOK_Input, Operand->getStartLoc(),
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Operand->getNameLen()));
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}
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}
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}
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@ -4142,9 +4140,14 @@ bool AsmParser::ParseMSInlineAsm(void *AsmLoc, std::string &AsmString,
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NumInputs = InputDecls.size();
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// Set the unique clobbers.
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for (std::set<std::string>::iterator I = ClobberRegs.begin(),
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E = ClobberRegs.end(); I != E; ++I)
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Clobbers.push_back(*I);
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array_pod_sort(ClobberRegs.begin(), ClobberRegs.end());
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ClobberRegs.erase(std::unique(ClobberRegs.begin(), ClobberRegs.end()),
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ClobberRegs.end());
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Clobbers.assign(ClobberRegs.size(), std::string());
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for (unsigned I = 0, E = ClobberRegs.size(); I != E; ++I) {
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raw_string_ostream OS(Clobbers[I]);
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IP->printRegName(OS, ClobberRegs[I]);
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}
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// Merge the various outputs and inputs. Output are expected first.
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if (NumOutputs || NumInputs) {
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@ -4166,9 +4169,10 @@ bool AsmParser::ParseMSInlineAsm(void *AsmLoc, std::string &AsmString,
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AsmRewriteKind PrevKind = AOK_Imm;
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raw_string_ostream OS(AsmStringIR);
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const char *Start = SrcMgr.getMemoryBuffer(0)->getBufferStart();
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array_pod_sort (AsmStrRewrites.begin(), AsmStrRewrites.end(), RewritesSort);
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for (SmallVectorImpl<struct AsmRewrite>::iterator
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I = AsmStrRewrites.begin(), E = AsmStrRewrites.end(); I != E; ++I) {
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array_pod_sort(AsmStrRewrites.begin(), AsmStrRewrites.end(), RewritesSort);
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for (SmallVectorImpl<AsmRewrite>::iterator I = AsmStrRewrites.begin(),
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E = AsmStrRewrites.end();
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I != E; ++I) {
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const char *Loc = (*I).Loc.getPointer();
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unsigned AdditionalSkip = 0;
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@ -4190,22 +4194,19 @@ bool AsmParser::ParseMSInlineAsm(void *AsmLoc, std::string &AsmString,
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switch (Kind) {
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default: break;
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case AOK_Imm:
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OS << Twine("$$");
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OS << (*I).Val;
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OS << "$$" << (*I).Val;
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break;
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case AOK_ImmPrefix:
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OS << Twine("$$");
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OS << "$$";
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break;
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case AOK_Input:
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OS << '$';
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OS << InputIdx++;
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OS << '$' << InputIdx++;
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break;
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case AOK_Output:
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OS << '$';
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OS << OutputIdx++;
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OS << '$' << OutputIdx++;
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break;
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case AOK_SizeDirective:
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switch((*I).Val) {
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switch ((*I).Val) {
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default: break;
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case 8: OS << "byte ptr "; break;
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case 16: OS << "word ptr "; break;
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@ -4224,7 +4225,7 @@ bool AsmParser::ParseMSInlineAsm(void *AsmLoc, std::string &AsmString,
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OS << ".align " << Val;
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// Skip the original immediate.
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assert (Val < 10 && "Expected alignment less then 2^10.");
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assert(Val < 10 && "Expected alignment less then 2^10.");
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AdditionalSkip = (Val < 4) ? 2 : Val < 7 ? 3 : 4;
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break;
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}
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