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Start implementing MachineCodeEmitter

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4870 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2002-12-02 21:44:34 +00:00
parent d1c45a6633
commit 76041ce515
2 changed files with 72 additions and 6 deletions
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39
lib/Target/X86/MachineCodeEmitter.cpp
View File

@ -8,6 +8,8 @@
#include "X86TargetMachine.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
namespace {
struct Emitter : public FunctionPass {
@ -15,10 +17,11 @@ namespace {
MachineCodeEmitter &MCE;
Emitter(TargetMachine &tm, MachineCodeEmitter &mce) : TM(tm), MCE(mce) {}
~Emitter() {
}
bool runOnFunction(Function &F) { return false; }
bool runOnFunction(Function &F);
void emitBasicBlock(MachineBasicBlock &MBB);
void emitInstruction(MachineInstr &MI);
};
}
@ -34,3 +37,33 @@ bool X86TargetMachine::addPassesToEmitMachineCode(PassManager &PM,
PM.add(new Emitter(*this, MCE));
return false;
}
bool Emitter::runOnFunction(Function &F) {
MachineFunction &MF = MachineFunction::get(&F);
MCE.startFunction(MF);
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
emitBasicBlock(*I);
MCE.finishFunction(MF);
return false;
}
void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
MCE.startBasicBlock(MBB);
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
emitInstruction(**I);
}
void Emitter::emitInstruction(MachineInstr &MI) {
unsigned Opcode = MI.getOpcode();
const MachineInstrDescriptor &Desc = TM.getInstrInfo().get(Opcode);
// Emit instruction prefixes if neccesary
if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);// Operand size...
if (Desc.TSFlags & X86II::TB) MCE.emitByte(0x0F); // Two-byte opcode prefix
switch (Desc.TSFlags & X86II::FormMask) {
case X86II::RawFrm:
;
}
}

39
lib/Target/X86/X86CodeEmitter.cpp
View File

@ -8,6 +8,8 @@
#include "X86TargetMachine.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
namespace {
struct Emitter : public FunctionPass {
@ -15,10 +17,11 @@ namespace {
MachineCodeEmitter &MCE;
Emitter(TargetMachine &tm, MachineCodeEmitter &mce) : TM(tm), MCE(mce) {}
~Emitter() {
}
bool runOnFunction(Function &F) { return false; }
bool runOnFunction(Function &F);
void emitBasicBlock(MachineBasicBlock &MBB);
void emitInstruction(MachineInstr &MI);
};
}
@ -34,3 +37,33 @@ bool X86TargetMachine::addPassesToEmitMachineCode(PassManager &PM,
PM.add(new Emitter(*this, MCE));
return false;
}
bool Emitter::runOnFunction(Function &F) {
MachineFunction &MF = MachineFunction::get(&F);
MCE.startFunction(MF);
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
emitBasicBlock(*I);
MCE.finishFunction(MF);
return false;
}
void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
MCE.startBasicBlock(MBB);
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
emitInstruction(**I);
}
void Emitter::emitInstruction(MachineInstr &MI) {
unsigned Opcode = MI.getOpcode();
const MachineInstrDescriptor &Desc = TM.getInstrInfo().get(Opcode);
// Emit instruction prefixes if neccesary
if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);// Operand size...
if (Desc.TSFlags & X86II::TB) MCE.emitByte(0x0F); // Two-byte opcode prefix
switch (Desc.TSFlags & X86II::FormMask) {
case X86II::RawFrm:
;
}
}