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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25845 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -37,4 +37,18 @@ t1:
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1) should be replaced with a brz in V9 mode.
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* Same as above, but emit conditional move on register zero (p192) in V9 mode.
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* Same as above, but emit conditional move on register zero (p192) in V9
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mode. Testcase:
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int %t1(int %a, int %b) {
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%C = seteq int %a, 0
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%D = select bool %C, int %a, int %b
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ret int %D
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}
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* Emit MULX/[SU]DIVX instructions in V9 mode instead of fiddling
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with the Y register, if they are faster.
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* Codegen bswap(load)/store(bswap) -> load/store ASI
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@ -37,4 +37,18 @@ t1:
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1) should be replaced with a brz in V9 mode.
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* Same as above, but emit conditional move on register zero (p192) in V9 mode.
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* Same as above, but emit conditional move on register zero (p192) in V9
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mode. Testcase:
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int %t1(int %a, int %b) {
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%C = seteq int %a, 0
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%D = select bool %C, int %a, int %b
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ret int %D
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}
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* Emit MULX/[SU]DIVX instructions in V9 mode instead of fiddling
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with the Y register, if they are faster.
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* Codegen bswap(load)/store(bswap) -> load/store ASI
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