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Make tests register allocation independent again.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129739 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2011-04-19 00:14:43 +00:00
parent b58a340fa2
commit 775c3e5824
4 changed files with 10 additions and 14 deletions
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4
test/CodeGen/ARM/fcopysign.ll
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@ -45,10 +45,10 @@ define i32 @test4() ssp {
entry:
; SOFT: test4:
; SOFT: vmov.f64 [[REG4:(d[0-9]+)]], #1.000000e+00
; SOFT: vcvt.f32.f64 s0, [[REG4]]
; SOFT: vcvt.f32.f64 {{s[0-9]+}}, [[REG4]]
; SOFT: vshr.u64 [[REG4]], [[REG4]], #32
; SOFT: vmov.i32 [[REG5:(d[0-9]+)]], #0x80000000
; SOFT: vbsl [[REG5]], [[REG4]], d0
; SOFT: vbsl [[REG5]], [[REG4]], {{d[0-9]+}}
%call80 = tail call double @copysign(double 1.000000e+00, double undef)
%conv81 = fptrunc double %call80 to float
%tmp88 = bitcast float %conv81 to i32

2
test/CodeGen/ARM/inlineasm3.ll
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@ -6,7 +6,7 @@
define void @t() nounwind {
entry:
; CHECK: vmov.I64 q15, #0
; CHECK: vmov.32 d30[0], r0
; CHECK: vmov.32 d30[0],
; CHECK: vmov q8, q15
%tmp = alloca %struct.int32x4_t, align 16
call void asm sideeffect "vmov.I64 q15, #0\0Avmov.32 d30[0], $1\0Avmov ${0:q}, q15\0A", "=*w,r,~{d31},~{d30}"(%struct.int32x4_t* %tmp, i32 8192) nounwind

16
test/CodeGen/Mips/buildpairextractelementf64.ll
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@ -1,13 +1,11 @@
; RUN: llc < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-EL
; RUN: llc < %s -march=mips | FileCheck %s -check-prefix=CHECK-EB
; RUN: llc < %s -march=mipsel | FileCheck %s
; RUN: llc < %s -march=mips | FileCheck %s
@a = external global i32
define double @f(i32 %a1, double %d) nounwind {
entry:
; CHECK-EL: mtc1 $6, $f12
; CHECK-EL: mtc1 $7, $f13
; CHECK-EB: mtc1 $7, $f12
; CHECK-EB: mtc1 $6, $f13
; CHECK: mtc1
; CHECK: mtc1
store i32 %a1, i32* @a, align 4
%add = fadd double %d, 2.000000e+00
ret double %add
@ -15,10 +13,8 @@ entry:
define void @f3(double %d, i32 %a1) nounwind {
entry:
; CHECK-EL: mfc1 ${{[0-9]+}}, $f12
; CHECK-EL: mfc1 $7, $f13
; CHECK-EB: mfc1 ${{[0-9]+}}, $f13
; CHECK-EB: mfc1 $7, $f12
; CHECK: mfc1
; CHECK: mfc1
tail call void @f2(i32 %a1, double %d) nounwind
ret void
}

2
test/CodeGen/Thumb/2010-07-15-debugOrdering.ll
View File

@ -10,7 +10,7 @@
define void @_Z19getClosestDiagonal3ii(%0* noalias sret, i32, i32) nounwind {
; CHECK: blx ___muldf3
; CHECK: blx ___muldf3
; CHECK: beq LBB0_7
; CHECK: beq LBB0
; CHECK: blx ___muldf3
; <label>:3
switch i32 %1, label %4 [