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[DAGCombiner] Add more rules to combine shuffle vector dag nodes.
This patch teaches the DAGCombiner how to fold a pair of shuffles according to rules: 1. shuffle(shuffle A, B, M0), B, M1) -> shuffle(A, B, M2) 2. shuffle(shuffle A, B, M0), A, M1) -> shuffle(A, B, M3) The new rules would only trigger if the resulting shuffle has legal type and legal mask. Added test 'combine-vec-shuffle-3.ll' to verify that DAGCombiner correctly folds shuffles on x86 when the resulting mask is legal. Also added some negative cases to verify that we avoid introducing illegal shuffles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213001 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrea Di Biagio
parent
ff985d4218
commit
7847229c31
@ -10777,6 +10777,50 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
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}
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}
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// Try to fold according to rules:
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// shuffle(shuffle A, B, M0), B, M1) -> shuffle(A, B, M2)
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// shuffle(shuffle A, B, M0), A, M1) -> shuffle(A, B, M2)
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// Don't try to fold shuffles with illegal type.
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if (N0.getOpcode() == ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDAG &&
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TLI.isTypeLegal(VT)) {
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ShuffleVectorSDNode *OtherSV = cast<ShuffleVectorSDNode>(N0);
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// The incoming shuffle must be of the same type as the result of the
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// current shuffle.
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assert(OtherSV->getOperand(0).getValueType() == VT &&
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"Shuffle types don't match");
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SDValue SV0 = OtherSV->getOperand(0);
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SDValue SV1 = OtherSV->getOperand(1);
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bool HasSameOp0 = N1 == SV0;
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if (!HasSameOp0 && N1 != SV1)
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// Early exit.
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return SDValue();
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SmallVector<int, 4> Mask;
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// Compute the combined shuffle mask for a shuffle with SV0 as the first
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// operand, and SV1 as the second operand.
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for (unsigned i = 0; i != NumElts; ++i) {
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int Idx = SVN->getMaskElt(i);
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if (Idx < 0) {
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// Propagate Undef.
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Mask.push_back(Idx);
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continue;
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}
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if (Idx < (int)NumElts)
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Idx = OtherSV->getMaskElt(Idx);
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else
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Idx = HasSameOp0 ? Idx - NumElts : Idx;
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Mask.push_back(Idx);
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}
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// Avoid introducing shuffles with illegal mask.
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if (TLI.isShuffleMaskLegal(Mask, VT))
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return DAG.getVectorShuffle(VT, SDLoc(N), SV0, SV1, &Mask[0]);
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}
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return SDValue();
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}
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373
test/CodeGen/X86/combine-vec-shuffle-3.ll
Normal file
373
test/CodeGen/X86/combine-vec-shuffle-3.ll
Normal file
@ -0,0 +1,373 @@
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
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define <4 x float> @test1(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test1
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; Mask: [0,1,2,3]
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; CHECK: movaps
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; CHECK: ret
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define <4 x float> @test2(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test2
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; Mask: [0,5,6,7]
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; CHECK: movss
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; CHECK: ret
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define <4 x float> @test3(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 1>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test3
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; Mask: [0,1,4,5]
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; CHECK: movlhps
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; CHECK: ret
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define <4 x float> @test4(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
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ret <4 x float> %2
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}
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; FIXME: this should be lowered as a single movhlps. However, the backend
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; wrongly thinks that shuffle mask [6,7,2,3] is not legal. Therefore, we
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; end up with the sub-optimal sequence 'shufps, palignr'.
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; CHECK-LABEL: test4
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; Mask: [6,7,2,3]
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; CHECK: shufps $84
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; CHECK: palignr $8
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; CHECK: ret
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define <4 x float> @test5(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test5
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; Mask: [4,1,6,7]
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; CHECK: blendps $13
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; CHECK: ret
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define <4 x i32> @test6(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test6
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; Mask: [4,5,6,7]
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; CHECK: movaps
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; CHECK: ret
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define <4 x i32> @test7(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test7
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; Mask: [0,5,6,7]
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; CHECK: movss
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; CHECK: ret
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define <4 x i32> @test8(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 1>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test8
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; Mask: [0,1,4,5]
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; CHECK: movlhps
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; CHECK: ret
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define <4 x i32> @test9(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
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ret <4 x i32> %2
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}
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; FIXME: this should be lowered as a single movhlps. However, the backend thinks that
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; shuffle mask [6,7,2,3] is not legal.
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; CHECK-LABEL: test9
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; Mask: [6,7,2,3]
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; CHECK: shufps $84
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; CHECK: palignr $8
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; CHECK: ret
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define <4 x i32> @test10(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test10
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; Mask: [4,1,6,7]
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; CHECK: blendps
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; CHECK: ret
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define <4 x float> @test11(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test11
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; Mask: [0,1,2,3]
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; CHECK-NOT: movaps
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; CHECK-NOT: blendps
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; CHECK: ret
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define <4 x float> @test12(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test12
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; Mask: [0,5,6,7]
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; CHECK: movss
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; CHECK: ret
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define <4 x float> @test13(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test13
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; Mask: [0,1,4,5]
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; CHECK: movlhps
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; CHECK: ret
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define <4 x float> @test14(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 6, i32 7, i32 5, i32 5>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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ret <4 x float> %2
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}
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; FIXME: this should be lowered as a single movhlps. However, the backend
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; wrongly thinks that shuffle mask [6,7,2,3] is not legal. Therefore, we
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; end up with the sub-optimal sequence 'pshufd, blendps'.
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; CHECK-LABEL: test14
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; Mask: [6,7,2,3]
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; CHECK: pshufd $94
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; CHECK: blendps $12
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; CHECK: ret
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define <4 x float> @test15(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 7>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 2, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test15
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; Mask: [4,1,6,7]
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; CHECK: blendps $13
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; CHECK: ret
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define <4 x i32> @test16(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test16
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; Mask: [0,1,2,3]
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; CHECK-NOT: movaps
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; CHECK-NOT: blendps
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; CHECK: ret
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define <4 x i32> @test17(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test17
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; Mask: [0,5,6,7]
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; CHECK: movss
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; CHECK: ret
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define <4 x i32> @test18(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %a, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test18
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; Mask: [0,1,4,5]
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; CHECK: movlhps
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; CHECK: ret
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define <4 x i32> @test19(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 5, i32 5>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %a, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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ret <4 x i32> %2
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}
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; FIXME: this should be lowered as a single movhlps. However, the backend
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; wrongly thinks that shuffle mask [6,7,2,3] is not legal. Therefore, we
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; end up with the sub-optimal sequence 'shufps, palignr'.
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; CHECK-LABEL: test19
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; Mask: [6,7,2,3]
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; CHECK: pshufd $94
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; CHECK: blendps $12
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; CHECK: ret
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define <4 x i32> @test20(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 7>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %a, <4 x i32> <i32 0, i32 5, i32 2, i32 3>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test20
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; Mask: [4,1,6,7]
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; CHECK: blendps $13
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; CHECK: ret
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; Check some negative cases.
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define <4 x float> @test1b(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 0>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test1b
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; CHECK: shufps
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; CHECK: shufps
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; CHECK: ret
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define <4 x float> @test2b(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 0, i32 5>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test2b
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; CHECK: shufps
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; CHECK: pshufd
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; CHECK: ret
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define <4 x float> @test3b(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 7, i32 2, i32 7>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test3b
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; CHECK: shufps
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; CHECK: shufps
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; CHECK: ret
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define <4 x float> @test4b(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 5, i32 5, i32 2, i32 7>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test4b
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; CHECK: shufps
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; CHECK: shufps
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; CHECK: ret
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; Verify that we correctly fold shuffles even when we use illegal vector types.
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define <4 x i8> @test1c(<4 x i8>* %a, <4 x i8>* %b) {
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%A = load <4 x i8>* %a
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%B = load <4 x i8>* %b
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%1 = shufflevector <4 x i8> %A, <4 x i8> %B, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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%2 = shufflevector <4 x i8> %1, <4 x i8> %B, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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ret <4 x i8> %2
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}
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; CHECK-LABEL: test1c
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; Mask: [0,5,6,7]
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; CHECK: movss
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; CHECK-NEXT: ret
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define <4 x i8> @test2c(<4 x i8>* %a, <4 x i8>* %b) {
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%A = load <4 x i8>* %a
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%B = load <4 x i8>* %b
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%1 = shufflevector <4 x i8> %A, <4 x i8> %B, <4 x i32> <i32 0, i32 5, i32 1, i32 5>
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%2 = shufflevector <4 x i8> %1, <4 x i8> %B, <4 x i32> <i32 0, i32 2, i32 4, i32 1>
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ret <4 x i8> %2
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}
|
||||
; CHECK-LABEL: test2c
|
||||
; Mask: [0,1,4,5]
|
||||
; CHECK: movlhps
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
define <4 x i8> @test3c(<4 x i8>* %a, <4 x i8>* %b) {
|
||||
%A = load <4 x i8>* %a
|
||||
%B = load <4 x i8>* %b
|
||||
%1 = shufflevector <4 x i8> %A, <4 x i8> %B, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
|
||||
%2 = shufflevector <4 x i8> %1, <4 x i8> %B, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
|
||||
ret <4 x i8> %2
|
||||
}
|
||||
; FIXME: this should be lowered as a single movhlps. However, the backend
|
||||
; wrongly thinks that shuffle mask [6,7,2,3] is not legal. Therefore, we end up
|
||||
; with a sub-optimal sequence of 'shufps+palignr'.
|
||||
|
||||
; CHECK-LABEL: test3c
|
||||
; Mask: [6,7,2,3]
|
||||
; CHECK: shufps $84
|
||||
; CHECK: palignr $8
|
||||
; CHECK: ret
|
||||
|
||||
define <4 x i8> @test4c(<4 x i8>* %a, <4 x i8>* %b) {
|
||||
%A = load <4 x i8>* %a
|
||||
%B = load <4 x i8>* %b
|
||||
%1 = shufflevector <4 x i8> %A, <4 x i8> %B, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
|
||||
%2 = shufflevector <4 x i8> %1, <4 x i8> %B, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
|
||||
ret <4 x i8> %2
|
||||
}
|
||||
; CHECK-LABEL: test4c
|
||||
; Mask: [4,1,6,7]
|
||||
; CHECK: blendps $13
|
||||
; CHECK: ret
|
||||
|
||||
; The following test cases are generated from this C++ code
|
||||
;
|
||||
;__m128 blend_01(__m128 a, __m128 b)
|
||||
;{
|
||||
; __m128 s = a;
|
||||
; s = _mm_blend_ps( s, b, 1<<0 );
|
||||
; s = _mm_blend_ps( s, b, 1<<1 );
|
||||
; return s;
|
||||
;}
|
||||
;
|
||||
;__m128 blend_02(__m128 a, __m128 b)
|
||||
;{
|
||||
; __m128 s = a;
|
||||
; s = _mm_blend_ps( s, b, 1<<0 );
|
||||
; s = _mm_blend_ps( s, b, 1<<2 );
|
||||
; return s;
|
||||
;}
|
||||
;
|
||||
;__m128 blend_123(__m128 a, __m128 b)
|
||||
;{
|
||||
; __m128 s = a;
|
||||
; s = _mm_blend_ps( s, b, 1<<1 );
|
||||
; s = _mm_blend_ps( s, b, 1<<2 );
|
||||
; s = _mm_blend_ps( s, b, 1<<3 );
|
||||
; return s;
|
||||
;}
|
||||
|
||||
; Ideally, we should collapse the following shuffles into a single one.
|
||||
|
||||
define <4 x float> @blend_01(<4 x float> %a, <4 x float> %b) {
|
||||
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 undef, i32 2, i32 3>
|
||||
%shuffle6 = shufflevector <4 x float> %shuffle, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 3>
|
||||
ret <4 x float> %shuffle6
|
||||
}
|
||||
; CHECK-LABEL: blend_01
|
||||
; CHECK: movsd
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
define <4 x float> @blend_02(<4 x float> %a, <4 x float> %b) {
|
||||
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 undef, i32 3>
|
||||
%shuffle6 = shufflevector <4 x float> %shuffle, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
|
||||
ret <4 x float> %shuffle6
|
||||
}
|
||||
; CHECK-LABEL: blend_02
|
||||
; CHECK: blendps $5
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
define <4 x float> @blend_123(<4 x float> %a, <4 x float> %b) {
|
||||
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 undef, i32 undef>
|
||||
%shuffle6 = shufflevector <4 x float> %shuffle, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 undef>
|
||||
%shuffle12 = shufflevector <4 x float> %shuffle6, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
|
||||
ret <4 x float> %shuffle12
|
||||
}
|
||||
; CHECK-LABEL: blend_123
|
||||
; CHECK: movss
|
||||
; CHECK: ret
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user