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Add another missing 64-bit itinerary definition for the PPC A2 core.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158393 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel 2012-06-13 05:55:09 +00:00
parent ee28e0fdd1
commit 79248299f6
1 changed files with 11 additions and 0 deletions
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11
lib/Target/PowerPC/PPCScheduleA2.td
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@ -302,6 +302,17 @@ def PPCA2Itineraries : ProcessorItineraries<
InstrStage<1, [XEX5]>, InstrStage<1, [XEX6]>],
[14, 7],
[GPR_Bypass, GPR_Bypass]>,
InstrItinData<LdStLD , [InstrStage<4,
[IU0to3_0, IU0to3_1, IU0to3_2, IU0to3_3]>,
InstrStage<1, [IU4_0, IU4_1, IU4_2, IU4_3,
IU4_4, IU4_5, IU4_6, IU4_7]>,
InstrStage<1, [IU5]>, InstrStage<1, [IU6]>,
InstrStage<1, [RF0]>, InstrStage<1, [XRF1]>,
InstrStage<1, [XEX1]>, InstrStage<1, [XEX2]>,
InstrStage<1, [XEX3]>, InstrStage<1, [XEX4]>,
InstrStage<1, [XEX5]>, InstrStage<1, [XEX6]>],
[14, 7],
[GPR_Bypass, GPR_Bypass]>,
InstrItinData<LdStStore , [InstrStage<4,
[IU0to3_0, IU0to3_1, IU0to3_2, IU0to3_3]>,
InstrStage<1, [IU4_0, IU4_1, IU4_2, IU4_3,