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Move commentary on opcode translation for code16 mov instructions

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to segment registers closer to the segment register check for when
we add further optimizations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363355 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2019-06-14 04:51:55 +00:00
parent ee28aef98c
commit 7a01be2925
1 changed files with 2 additions and 2 deletions
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4
lib/Target/X86/AsmParser/X86AsmParser.cpp
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@ -2678,13 +2678,13 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
static_cast<X86Operand &>(*Operands[0]).setTokenValue(Repl);
}
// Moving a 32 or 16 bit value into a segment register has the same
// behavior. Modify such instructions to always take shorter form.
if ((Name == "mov" || Name == "movw" || Name == "movl") &&
(Operands.size() == 3)) {
X86Operand &Op1 = (X86Operand &)*Operands[1];
X86Operand &Op2 = (X86Operand &)*Operands[2];
SMLoc Loc = Op1.getEndLoc();
// Moving a 32 or 16 bit value into a segment register has the same
// behavior. Modify such instructions to always take shorter form.
if (Op1.isReg() && Op2.isReg() &&
X86MCRegisterClasses[X86::SEGMENT_REGRegClassID].contains(
Op2.getReg()) &&