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InstCombine: fix a bug when combining (fcmp cc0 x, y) && (fcmp cc1 x, y).

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uno && ueq was converted to ueq, it should be converted to uno.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158441 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Manman Ren 2012-06-14 05:57:42 +00:00
parent ce5c6fb55f
commit 7a0575b9a8
3 changed files with 34 additions and 3 deletions
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6
lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
View File

@ -995,9 +995,11 @@ Value *InstCombiner::FoldAndOfFCmps(FCmpInst *LHS, FCmpInst *RHS) {
std::swap(Op0Ordered, Op1Ordered);
}
if (Op0Pred == 0) {
// uno && ueq -> uno && (uno || eq) -> ueq
// uno && ueq -> uno && (uno || eq) -> uno
// ord && olt -> ord && (ord && lt) -> olt
if (Op0Ordered == Op1Ordered)
if (!Op0Ordered && (Op0Ordered == Op1Ordered))
return LHS;
if (Op0Ordered && (Op0Ordered == Op1Ordered))
return RHS;
// uno && oeq -> uno && (ord && eq) -> false

20
test/CodeGen/ARM/iabs.ll
View File

@ -10,7 +10,25 @@ define i32 @test(i32 %a) {
%b = icmp sgt i32 %a, -1
%abs = select i1 %b, i32 %a, i32 %tmp1neg
ret i32 %abs
; CHECK: movs r0, r0
; CHECK: cmp
; CHECK: rsbmi r0, r0, #0
; CHECK: bx lr
}
; rdar://11633193
; 3 instructions will be generated for the following case:
; subs
; rsbmi
; bx
define i32 @test2(i32 %a, i32 %b) nounwind readnone ssp {
entry:
; CHECK: test2
; CHECK-NEXT: subs
; CHECK-NEXT: rsbmi
; CHECK-NEXT: bx
%sub = sub nsw i32 %a, %b
%cmp = icmp sgt i32 %sub, -1
%sub1 = sub nsw i32 0, %sub
%cond = select i1 %cmp, i32 %sub, i32 %sub1
ret i32 %cond
}

11
test/Transforms/InstCombine/and-fcmp.ll
View File

@ -66,3 +66,14 @@ define zeroext i8 @t6(float %x, float %y) nounwind {
; CHECK: t6
; CHECK: ret i8 0
}
define zeroext i8 @t7(float %x, float %y) nounwind {
%a = fcmp uno float %x, %y
%b = fcmp ult float %x, %y
%c = and i1 %a, %b
%retval = zext i1 %c to i8
ret i8 %retval
; CHECK: t7
; CHECK: fcmp uno
; CHECK-NOT: fcmp ult
}