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Update to reflect changes to the 'Register' tblgen class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16392 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -16,7 +16,7 @@
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<li><a href="#intro">Introduction</a>
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<li><a href="#backends">Writing a backend</a>
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<ol>
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<li><a href="#machine">Machine backends</a></li>
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<li><a href="#machine">Machine backends</a>
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<ol>
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<li><a href="#machineTOC">Outline</a></li>
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<li><a href="#machineDetails">Implementation details</a></li>
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@ -148,15 +148,15 @@ architected registers.</p>
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<div class="doc_code">
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<pre>
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// class Register is defined in Target.td
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<b>class</b> <em>Target</em>Reg : Register {
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<b>class</b> <em>Target</em>Reg<string name> : Register<name> {
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<b>let</b> Namespace = "<em>Target</em>";
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}
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<b>class</b> IntReg<<b>bits</b><5> num> : <em>Target</em>Reg {
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<b>class</b> IntReg<<b>bits</b><5> num, string name> : <em>Target</em>Reg<name> {
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<b>field</b> <b>bits</b><5> Num = num;
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}
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<b>def</b> R0 : IntReg<0>;
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<b>def</b> R0 : IntReg<0, "%R0">;
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...
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// class RegisterClass is defined in Target.td
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