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PR5207: Rename overloaded APInt methods set(), clear(), flip() to
setAllBits(), setBit(unsigned), etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120564 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -380,15 +380,15 @@ public:
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/// @brief Gets maximum unsigned value of APInt for specific bit width.
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static APInt getMaxValue(unsigned numBits) {
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APInt API(numBits, 0);
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API.set();
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API.setAllBits();
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return API;
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}
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/// @brief Gets maximum signed value of APInt for a specific bit width.
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static APInt getSignedMaxValue(unsigned numBits) {
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APInt API(numBits, 0);
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API.set();
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API.clear(numBits - 1);
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API.setAllBits();
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API.clearBit(numBits - 1);
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return API;
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}
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@ -400,7 +400,7 @@ public:
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/// @brief Gets minimum signed value of APInt for a specific bit width.
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static APInt getSignedMinValue(unsigned numBits) {
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APInt API(numBits, 0);
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API.set(numBits - 1);
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API.setBit(numBits - 1);
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return API;
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}
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@ -415,7 +415,7 @@ public:
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/// @brief Get the all-ones value.
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static APInt getAllOnesValue(unsigned numBits) {
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APInt API(numBits, 0);
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API.set();
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API.setAllBits();
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return API;
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}
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@ -533,7 +533,7 @@ public:
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/// @brief Unary bitwise complement operator.
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APInt operator~() const {
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APInt Result(*this);
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Result.flip();
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Result.flipAllBits();
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return Result;
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}
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@ -1044,7 +1044,7 @@ public:
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/// @name Bit Manipulation Operators
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/// @{
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/// @brief Set every bit to 1.
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void set() {
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void setAllBits() {
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if (isSingleWord())
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VAL = -1ULL;
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else {
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@ -1058,10 +1058,10 @@ public:
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/// Set the given bit to 1 whose position is given as "bitPosition".
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/// @brief Set a given bit to 1.
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void set(unsigned bitPosition);
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void setBit(unsigned bitPosition);
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/// @brief Set every bit to 0.
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void clear() {
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void clearAllBits() {
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if (isSingleWord())
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VAL = 0;
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else
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@ -1070,10 +1070,10 @@ public:
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/// Set the given bit to 0 whose position is given as "bitPosition".
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/// @brief Set a given bit to 0.
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void clear(unsigned bitPosition);
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void clearBit(unsigned bitPosition);
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/// @brief Toggle every bit to its opposite value.
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void flip() {
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void flipAllBits() {
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if (isSingleWord())
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VAL ^= -1ULL;
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else {
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@ -1086,7 +1086,7 @@ public:
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/// Toggle a given bit to its opposite value whose position is given
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/// as "bitPosition".
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/// @brief Toggles a given bit to its opposite value.
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void flip(unsigned bitPosition);
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void flipBit(unsigned bitPosition);
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/// @}
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/// @name Value Characterization Functions
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@ -4602,7 +4602,7 @@ static const SCEV *SolveLinEquationWithOverflow(const APInt &A, const APInt &B,
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// bit width during computations.
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APInt AD = A.lshr(Mult2).zext(BW + 1); // AD = A / D
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APInt Mod(BW + 1, 0);
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Mod.set(BW - Mult2); // Mod = N / D
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Mod.setBit(BW - Mult2); // Mod = N / D
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APInt I = AD.multiplicativeInverse(Mod);
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// 4. Compute the minimum unsigned root of the equation:
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@ -69,14 +69,14 @@ void llvm::ComputeMaskedBits(Value *V, const APInt &Mask,
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// Null and aggregate-zero are all-zeros.
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if (isa<ConstantPointerNull>(V) ||
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isa<ConstantAggregateZero>(V)) {
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KnownOne.clear();
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KnownOne.clearAllBits();
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KnownZero = Mask;
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return;
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}
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// Handle a constant vector by taking the intersection of the known bits of
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// each element.
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if (ConstantVector *CV = dyn_cast<ConstantVector>(V)) {
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KnownZero.set(); KnownOne.set();
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KnownZero.setAllBits(); KnownOne.setAllBits();
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for (unsigned i = 0, e = CV->getNumOperands(); i != e; ++i) {
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APInt KnownZero2(BitWidth, 0), KnownOne2(BitWidth, 0);
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ComputeMaskedBits(CV->getOperand(i), Mask, KnownZero2, KnownOne2,
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@ -103,15 +103,15 @@ void llvm::ComputeMaskedBits(Value *V, const APInt &Mask,
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KnownZero = Mask & APInt::getLowBitsSet(BitWidth,
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CountTrailingZeros_32(Align));
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else
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KnownZero.clear();
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KnownOne.clear();
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KnownZero.clearAllBits();
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KnownOne.clearAllBits();
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return;
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}
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// A weak GlobalAlias is totally unknown. A non-weak GlobalAlias has
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// the bits of its aliasee.
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if (GlobalAlias *GA = dyn_cast<GlobalAlias>(V)) {
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if (GA->mayBeOverridden()) {
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KnownZero.clear(); KnownOne.clear();
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KnownZero.clearAllBits(); KnownOne.clearAllBits();
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} else {
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ComputeMaskedBits(GA->getAliasee(), Mask, KnownZero, KnownOne,
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TD, Depth+1);
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@ -119,7 +119,7 @@ void llvm::ComputeMaskedBits(Value *V, const APInt &Mask,
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return;
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}
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KnownZero.clear(); KnownOne.clear(); // Start out not knowing anything.
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KnownZero.clearAllBits(); KnownOne.clearAllBits(); // Start out not knowing anything.
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if (Depth == MaxDepth || Mask == 0)
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return; // Limit search depth.
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@ -185,7 +185,7 @@ void llvm::ComputeMaskedBits(Value *V, const APInt &Mask,
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// Also compute a conserative estimate for high known-0 bits.
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// More trickiness is possible, but this is sufficient for the
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// interesting case of alignment computation.
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KnownOne.clear();
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KnownOne.clearAllBits();
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unsigned TrailZ = KnownZero.countTrailingOnes() +
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KnownZero2.countTrailingOnes();
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unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
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@ -208,8 +208,8 @@ void llvm::ComputeMaskedBits(Value *V, const APInt &Mask,
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AllOnes, KnownZero2, KnownOne2, TD, Depth+1);
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unsigned LeadZ = KnownZero2.countLeadingOnes();
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KnownOne2.clear();
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KnownZero2.clear();
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KnownOne2.clearAllBits();
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KnownZero2.clearAllBits();
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ComputeMaskedBits(I->getOperand(1),
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AllOnes, KnownZero2, KnownOne2, TD, Depth+1);
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unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
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@ -474,7 +474,7 @@ void llvm::ComputeMaskedBits(Value *V, const APInt &Mask,
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unsigned Leaders = std::max(KnownZero.countLeadingOnes(),
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KnownZero2.countLeadingOnes());
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KnownOne.clear();
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KnownOne.clearAllBits();
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KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
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break;
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}
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@ -876,7 +876,7 @@ bool llvm::ComputeMultiple(Value *V, unsigned Base, Value *&Multiple,
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APInt Op1Int = Op1CI->getValue();
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uint64_t BitToSet = Op1Int.getLimitedValue(Op1Int.getBitWidth() - 1);
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APInt API(Op1Int.getBitWidth(), 0);
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API.set(BitToSet);
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API.setBit(BitToSet);
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Op1 = ConstantInt::get(V->getContext(), API);
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}
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@ -134,7 +134,7 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N) {
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// Mask = ~(1 << (Size-1))
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APInt API = APInt::getAllOnesValue(Size);
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API.clear(Size-1);
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API.clearBit(Size-1);
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SDValue Mask = DAG.getConstant(API, NVT);
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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return DAG.getNode(ISD::AND, N->getDebugLoc(), NVT, Op, Mask);
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@ -292,7 +292,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_CTTZ(SDNode *N) {
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// value was zero. This can be handled by setting the bit just off
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// the top of the original type.
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APInt TopBit(NVT.getSizeInBits(), 0);
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TopBit.set(OVT.getSizeInBits());
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TopBit.setBit(OVT.getSizeInBits());
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Op = DAG.getNode(ISD::OR, dl, NVT, Op, DAG.getConstant(TopBit, NVT));
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return DAG.getNode(ISD::CTTZ, dl, NVT, Op);
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}
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@ -1654,7 +1654,7 @@ void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
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// Also compute a conserative estimate for high known-0 bits.
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// More trickiness is possible, but this is sufficient for the
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// interesting case of alignment computation.
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KnownOne.clear();
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KnownOne.clearAllBits();
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unsigned TrailZ = KnownZero.countTrailingOnes() +
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KnownZero2.countTrailingOnes();
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unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
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@ -1677,8 +1677,8 @@ void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
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AllOnes, KnownZero2, KnownOne2, Depth+1);
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unsigned LeadZ = KnownZero2.countLeadingOnes();
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KnownOne2.clear();
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KnownZero2.clear();
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KnownOne2.clearAllBits();
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KnownZero2.clearAllBits();
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ComputeMaskedBits(Op.getOperand(1),
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AllOnes, KnownZero2, KnownOne2, Depth+1);
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unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
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@ -1833,7 +1833,7 @@ void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
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case ISD::CTPOP: {
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unsigned LowBits = Log2_32(BitWidth)+1;
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KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
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KnownOne.clear();
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KnownOne.clearAllBits();
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return;
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}
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case ISD::LOAD: {
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@ -2032,7 +2032,7 @@ void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
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uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
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KnownZero2.countLeadingOnes());
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KnownOne.clear();
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KnownOne.clearAllBits();
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KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
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return;
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}
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@ -361,7 +361,7 @@ APInt& APInt::operator*=(const APInt& RHS) {
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unsigned rhsWords = !rhsBits ? 0 : whichWord(rhsBits - 1) + 1;
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if (!rhsWords) {
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// X * 0 ===> 0
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clear();
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clearAllBits();
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return *this;
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}
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@ -373,7 +373,7 @@ APInt& APInt::operator*=(const APInt& RHS) {
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mul(dest, pVal, lhsWords, RHS.pVal, rhsWords);
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// Copy result back into *this
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clear();
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clearAllBits();
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unsigned wordsToCopy = destWords >= getNumWords() ? getNumWords() : destWords;
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memcpy(pVal, dest, wordsToCopy * APINT_WORD_SIZE);
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@ -562,12 +562,12 @@ bool APInt::slt(const APInt& RHS) const {
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bool rhsNeg = rhs.isNegative();
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if (lhsNeg) {
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// Sign bit is set so perform two's complement to make it positive
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lhs.flip();
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lhs.flipAllBits();
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lhs++;
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}
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if (rhsNeg) {
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// Sign bit is set so perform two's complement to make it positive
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rhs.flip();
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rhs.flipAllBits();
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rhs++;
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}
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@ -584,7 +584,7 @@ bool APInt::slt(const APInt& RHS) const {
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return lhs.ult(rhs);
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}
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void APInt::set(unsigned bitPosition) {
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void APInt::setBit(unsigned bitPosition) {
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if (isSingleWord())
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VAL |= maskBit(bitPosition);
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else
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@ -593,7 +593,7 @@ void APInt::set(unsigned bitPosition) {
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/// Set the given bit to 0 whose position is given as "bitPosition".
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/// @brief Set a given bit to 0.
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void APInt::clear(unsigned bitPosition) {
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void APInt::clearBit(unsigned bitPosition) {
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if (isSingleWord())
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VAL &= ~maskBit(bitPosition);
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else
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@ -605,10 +605,10 @@ void APInt::clear(unsigned bitPosition) {
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/// Toggle a given bit to its opposite value whose position is given
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/// as "bitPosition".
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/// @brief Toggles a given bit to its opposite value.
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void APInt::flip(unsigned bitPosition) {
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void APInt::flipBit(unsigned bitPosition) {
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assert(bitPosition < BitWidth && "Out of the bit-width range!");
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if ((*this)[bitPosition]) clear(bitPosition);
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else set(bitPosition);
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if ((*this)[bitPosition]) clearBit(bitPosition);
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else setBit(bitPosition);
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}
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unsigned APInt::getBitsNeeded(StringRef str, uint8_t radix) {
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@ -1871,7 +1871,7 @@ void APInt::divide(const APInt LHS, unsigned lhsWords,
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if (!Quotient->isSingleWord())
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Quotient->pVal = getClearedMemory(Quotient->getNumWords());
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} else
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Quotient->clear();
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Quotient->clearAllBits();
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// The quotient is in Q. Reconstitute the quotient into Quotient's low
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// order words.
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@ -1902,7 +1902,7 @@ void APInt::divide(const APInt LHS, unsigned lhsWords,
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if (!Remainder->isSingleWord())
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Remainder->pVal = getClearedMemory(Remainder->getNumWords());
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} else
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Remainder->clear();
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Remainder->clearAllBits();
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// The remainder is in R. Reconstitute the remainder into Remainder's low
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// order words.
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@ -2157,7 +2157,7 @@ void APInt::fromString(unsigned numbits, StringRef str, uint8_t radix) {
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// If its negative, put it in two's complement form
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if (isNeg) {
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(*this)--;
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this->flip();
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this->flipAllBits();
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}
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}
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@ -2205,7 +2205,7 @@ void APInt::toString(SmallVectorImpl<char> &Str, unsigned Radix,
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// They want to print the signed version and it is a negative value
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// Flip the bits and add one to turn it into the equivalent positive
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// value and put a '-' in the result.
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Tmp.flip();
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Tmp.flipAllBits();
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Tmp++;
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Str.push_back('-');
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}
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@ -160,8 +160,8 @@ static void ComputeSignedMinMaxValuesFromKnownBits(const APInt& KnownZero,
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Max = KnownOne|UnknownBits;
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if (UnknownBits.isNegative()) { // Sign bit is unknown
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Min.set(Min.getBitWidth()-1);
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Max.clear(Max.getBitWidth()-1);
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Min.setBit(Min.getBitWidth()-1);
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Max.clearBit(Max.getBitWidth()-1);
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}
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}
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@ -121,13 +121,13 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
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}
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if (isa<ConstantPointerNull>(V)) {
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// We know all of the bits for a constant!
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KnownOne.clear();
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KnownOne.clearAllBits();
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KnownZero = DemandedMask;
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return 0;
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}
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KnownZero.clear();
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KnownOne.clear();
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KnownZero.clearAllBits();
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KnownOne.clearAllBits();
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if (DemandedMask == 0) { // Not demanding any bits from V.
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if (isa<UndefValue>(V))
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return 0;
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@ -451,7 +451,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
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// If any of the sign extended bits are demanded, we know that the sign
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// bit is demanded.
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if ((NewBits & DemandedMask) != 0)
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InputDemandedBits.set(SrcBitWidth-1);
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InputDemandedBits.setBit(SrcBitWidth-1);
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InputDemandedBits.trunc(SrcBitWidth);
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KnownZero.trunc(SrcBitWidth);
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@ -634,7 +634,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
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// If any of the "high bits" are demanded, we should set the sign bit as
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// demanded.
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if (DemandedMask.countLeadingZeros() <= ShiftAmt)
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DemandedMaskIn.set(BitWidth-1);
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DemandedMaskIn.setBit(BitWidth-1);
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if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMaskIn,
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KnownZero, KnownOne, Depth+1))
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return I;
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@ -793,10 +793,10 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
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for (unsigned i = 0; i != VWidth; ++i)
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if (!DemandedElts[i]) { // If not demanded, set to undef.
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Elts.push_back(Undef);
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UndefElts.set(i);
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UndefElts.setBit(i);
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} else if (isa<UndefValue>(CV->getOperand(i))) { // Already undef.
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Elts.push_back(Undef);
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UndefElts.set(i);
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UndefElts.setBit(i);
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} else { // Otherwise, defined.
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Elts.push_back(CV->getOperand(i));
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}
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@ -879,13 +879,13 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
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// Otherwise, the element inserted overwrites whatever was there, so the
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// input demanded set is simpler than the output set.
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APInt DemandedElts2 = DemandedElts;
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DemandedElts2.clear(IdxNo);
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DemandedElts2.clearBit(IdxNo);
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TmpV = SimplifyDemandedVectorElts(I->getOperand(0), DemandedElts2,
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UndefElts, Depth+1);
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if (TmpV) { I->setOperand(0, TmpV); MadeChange = true; }
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// The inserted element is defined.
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UndefElts.clear(IdxNo);
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UndefElts.clearBit(IdxNo);
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break;
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}
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case Instruction::ShuffleVector: {
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@ -900,9 +900,9 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
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assert(MaskVal < LHSVWidth * 2 &&
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"shufflevector mask index out of range!");
|
||||
if (MaskVal < LHSVWidth)
|
||||
LeftDemanded.set(MaskVal);
|
||||
LeftDemanded.setBit(MaskVal);
|
||||
else
|
||||
RightDemanded.set(MaskVal - LHSVWidth);
|
||||
RightDemanded.setBit(MaskVal - LHSVWidth);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -921,16 +921,16 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
|
||||
for (unsigned i = 0; i < VWidth; i++) {
|
||||
unsigned MaskVal = Shuffle->getMaskValue(i);
|
||||
if (MaskVal == -1u) {
|
||||
UndefElts.set(i);
|
||||
UndefElts.setBit(i);
|
||||
} else if (MaskVal < LHSVWidth) {
|
||||
if (UndefElts4[MaskVal]) {
|
||||
NewUndefElts = true;
|
||||
UndefElts.set(i);
|
||||
UndefElts.setBit(i);
|
||||
}
|
||||
} else {
|
||||
if (UndefElts3[MaskVal - LHSVWidth]) {
|
||||
NewUndefElts = true;
|
||||
UndefElts.set(i);
|
||||
UndefElts.setBit(i);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -973,7 +973,7 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
|
||||
Ratio = VWidth/InVWidth;
|
||||
for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) {
|
||||
if (DemandedElts[OutIdx])
|
||||
InputDemandedElts.set(OutIdx/Ratio);
|
||||
InputDemandedElts.setBit(OutIdx/Ratio);
|
||||
}
|
||||
} else {
|
||||
// Untested so far.
|
||||
@ -985,7 +985,7 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
|
||||
Ratio = InVWidth/VWidth;
|
||||
for (unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
|
||||
if (DemandedElts[InIdx/Ratio])
|
||||
InputDemandedElts.set(InIdx);
|
||||
InputDemandedElts.setBit(InIdx);
|
||||
}
|
||||
|
||||
// div/rem demand all inputs, because they don't want divide by zero.
|
||||
@ -1004,7 +1004,7 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
|
||||
// undef.
|
||||
for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
|
||||
if (UndefElts2[OutIdx/Ratio])
|
||||
UndefElts.set(OutIdx);
|
||||
UndefElts.setBit(OutIdx);
|
||||
} else if (VWidth < InVWidth) {
|
||||
llvm_unreachable("Unimp");
|
||||
// If there are more elements in the source than there are in the result,
|
||||
@ -1013,7 +1013,7 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
|
||||
UndefElts = ~0ULL >> (64-VWidth); // Start out all undef.
|
||||
for (unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
|
||||
if (!UndefElts2[InIdx]) // Not undef?
|
||||
UndefElts.clear(InIdx/Ratio); // Clear undef bit.
|
||||
UndefElts.clearBit(InIdx/Ratio); // Clear undef bit.
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
@ -160,7 +160,7 @@ Instruction *InstCombiner::visitExtractElementInst(ExtractElementInst &EI) {
|
||||
if (EI.getOperand(0)->hasOneUse() && VectorWidth != 1) {
|
||||
APInt UndefElts(VectorWidth, 0);
|
||||
APInt DemandedMask(VectorWidth, 0);
|
||||
DemandedMask.set(IndexVal);
|
||||
DemandedMask.setBit(IndexVal);
|
||||
if (Value *V = SimplifyDemandedVectorElts(EI.getOperand(0),
|
||||
DemandedMask, UndefElts)) {
|
||||
EI.setOperand(0, V);
|
||||
|
@ -57,7 +57,7 @@ TEST(APIntTest, i33_Count) {
|
||||
|
||||
TEST(APIntTest, i65_Count) {
|
||||
APInt i65minus(65, 0, true);
|
||||
i65minus.set(64);
|
||||
i65minus.setBit(64);
|
||||
EXPECT_EQ(0u, i65minus.countLeadingZeros());
|
||||
EXPECT_EQ(1u, i65minus.countLeadingOnes());
|
||||
EXPECT_EQ(65u, i65minus.getActiveBits());
|
||||
|
Loading…
Reference in New Issue
Block a user