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The Mips specific inline asm operand modifier 'z' has the
following description in the gnu sources: Print $0 if operand is zero otherwise print the op normally. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159324 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -323,6 +323,17 @@ bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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return true;
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O << MO.getImm() - 1;
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return false;
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case 'z': // $0 if zero, regular printing otherwise
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{
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if (MO.getType() != MachineOperand::MO_Immediate)
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return true;
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int64_t Val = MO.getImm();
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if (Val)
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O << Val;
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else
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O << "$0";
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return false;
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}
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}
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}
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@ -340,6 +351,7 @@ bool MipsAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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const MachineOperand &MO = MI->getOperand(OpNum);
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assert(MO.isReg() && "unexpected inline asm memory operand");
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O << "0($" << MipsInstPrinter::getRegisterName(MO.getReg()) << ")";
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return false;
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}
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@ -29,5 +29,17 @@ entry:
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;CHECK: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:m}", "=r,r,I"(i32 7, i32 -3) nounwind
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; z with -3
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;CHECK: #APP
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;CHECK: addi ${{[0-9]+}},${{[0-9]+}},-3
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;CHECK: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 -3) nounwind
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; z with 0
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;CHECK: #APP
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;CHECK: addi ${{[0-9]+}},${{[0-9]+}},$0
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;CHECK: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 0) nounwind
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ret i32 0
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}
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