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Fix an oversight that may be causing PR617.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22753 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-08-10 17:37:53 +00:00
parent 6d92526fe1
commit 7c6e452d44
1 changed files with 13 additions and 4 deletions
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17
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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@ -626,12 +626,21 @@ SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1,
if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB ||
N2.getOpcode() == ISD::XOR) {
// Simplify X == (X+Z) --> Z == 0
if (N2.getOperand(0) == N1)
if (N2.getOperand(0) == N1) {
return getSetCC(VT, N2.getOperand(1),
getConstant(0, N2.getValueType()), Cond);
else if (N2.getOperand(1) == N1)
return getSetCC(VT, N2.getOperand(0), getConstant(0, N2.getValueType()),
Cond);
} else if (N2.getOperand(1) == N1) {
if (isCommutativeBinOp(N2.getOpcode())) {
return getSetCC(VT, N2.getOperand(0),
getConstant(0, N2.getValueType()), Cond);
} else {
assert(N2.getOpcode() == ISD::SUB && "Unexpected operation!");
// X == (Z-X) --> X<<1 == Z
return getSetCC(VT, getNode(ISD::SHL, N2.getValueType(), N1,
getConstant(1, TLI.getShiftAmountTy())),
N2.getOperand(0), Cond);
}
}
}
}