diff --git a/docs/WritingAnLLVMBackend.html b/docs/WritingAnLLVMBackend.html index acb5defbece..7277b029b7c 100644 --- a/docs/WritingAnLLVMBackend.html +++ b/docs/WritingAnLLVMBackend.html @@ -742,8 +742,8 @@ IntRegsClass::IntRegsClass() : TargetRegisterClass(IntRegsRegClassID,
- Implement a subclass of - TargetRegisterInfo + Implement a subclass of + TargetRegisterInfo

The final step is to hand code portions of XXXRegisterInfo, which @@ -998,8 +998,8 @@ be taken to ensure the values in Sparc.h correspond to the values in

- Implement a subclass of - TargetInstrInfo + Implement a subclass of + TargetInstrInfo
@@ -1339,7 +1339,7 @@ addRegisterClass(MVT::f64, SP::DFPRegsRegisterClass);

You should examine the node types in the ISD namespace (include/llvm/CodeGen/SelectionDAGNodes.h) and determine which operations the target natively supports. For operations -that do not have native support, add a callback to the constructor for +that do not have native support, add a callback to the constructor for the XXXTargetLowering class, so the instruction selection process knows what to do. The TargetLowering class callback methods (declared in llvm/Target/TargetLowering.h) are:

@@ -1465,7 +1465,7 @@ assert(Op.getValueType() == MVT::i32);

The Legal LegalizeAction enum value simply indicates that an -operation is natively supported. Legal represents the default condition, +operation is natively supported. Legal represents the default condition, so it is rarely used. In SparcISelLowering.cpp, the action for CTPOP (an operation to count the bits set in an integer) is natively supported only for SPARC v9. The following code enables the Expand conversion technique for non-v9 @@ -2067,7 +2067,7 @@ implemented with assembler.

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