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Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86
%RAX<def> = ... %RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3 The first def is defining RAX, not EAX so the top bits were not zero-extended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67511 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -165,6 +165,7 @@ bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) {
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unsigned DstReg = MI->getOperand(0).getReg();
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unsigned DstReg = MI->getOperand(0).getReg();
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unsigned InsReg = MI->getOperand(2).getReg();
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unsigned InsReg = MI->getOperand(2).getReg();
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unsigned InsSIdx = MI->getOperand(2).getSubReg();
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unsigned SubIdx = MI->getOperand(3).getImm();
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unsigned SubIdx = MI->getOperand(3).getImm();
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assert(SubIdx != 0 && "Invalid index for insert_subreg");
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assert(SubIdx != 0 && "Invalid index for insert_subreg");
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@ -177,8 +178,13 @@ bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) {
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DOUT << "subreg: CONVERTING: " << *MI;
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DOUT << "subreg: CONVERTING: " << *MI;
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if (DstSubReg == InsReg) {
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if (DstSubReg == InsReg && InsSIdx == 0) {
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// No need to insert an identify copy instruction.
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// No need to insert an identify copy instruction.
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// Watch out for case like this:
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// %RAX<def> = ...
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// %RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3
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// The first def is defining RAX, not EAX so the top bits were not
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// zero extended.
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DOUT << "subreg: eliminated!";
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DOUT << "subreg: eliminated!";
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} else {
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} else {
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// Insert sub-register copy
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// Insert sub-register copy
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25
test/CodeGen/X86/subreg-to-reg-2.ll
Normal file
25
test/CodeGen/X86/subreg-to-reg-2.ll
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@ -0,0 +1,25 @@
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; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movl
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; rdar://6707985
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%XXOO = type { %"struct.XXC::XXCC", i8*, %"struct.XXC::XXOO::$_71" }
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%XXValue = type opaque
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%"struct.XXC::ArrayStorage" = type { i32, i32, i32, i8*, i8*, [1 x %XXValue*] }
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%"struct.XXC::XXArray" = type { %XXOO, i32, %"struct.XXC::ArrayStorage"* }
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%"struct.XXC::XXCC" = type { i32 (...)**, i8* }
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%"struct.XXC::XXOO::$_71" = type { [2 x %XXValue*] }
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define internal fastcc %XXValue* @t(i64* %out, %"struct.XXC::ArrayStorage"* %tmp9) nounwind {
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prologue:
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%array = load %XXValue** inttoptr (i64 11111111 to %XXValue**) ; <%XXValue*> [#uses=0]
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%index = load %XXValue** inttoptr (i64 22222222 to %XXValue**) ; <%XXValue*> [#uses=1]
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%tmp = ptrtoint %XXValue* %index to i64 ; <i64> [#uses=2]
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store i64 %tmp, i64* %out
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%tmp6 = trunc i64 %tmp to i32 ; <i32> [#uses=1]
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br label %bb5
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bb5: ; preds = %prologue
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%tmp10 = zext i32 %tmp6 to i64 ; <i64> [#uses=1]
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%tmp11 = getelementptr %"struct.XXC::ArrayStorage"* %tmp9, i64 0, i32 5, i64 %tmp10 ; <%XXValue**> [#uses=1]
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%tmp12 = load %XXValue** %tmp11, align 8 ; <%XXValue*> [#uses=1]
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ret %XXValue* %tmp12
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}
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