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[X86][SSE] Merged ALIGNR/SLLDQ/SRLDQ shuffle decode comments. NFC.
Now that we can recognise different vector sizes - will make future AVX512 additions easier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253266 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -363,64 +363,38 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
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case X86::PSLLDQri:
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case X86::VPSLLDQri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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if (MI->getOperand(MI->getNumOperands() - 1).isImm())
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DecodePSLLDQMask(MVT::v16i8,
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MI->getOperand(MI->getNumOperands() - 1).getImm(),
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ShuffleMask);
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break;
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case X86::VPSLLDQYri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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if (MI->getOperand(MI->getNumOperands() - 1).isImm())
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DecodePSLLDQMask(MVT::v32i8,
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DecodePSLLDQMask(getRegOperandVectorVT(MI, MVT::i8, 0),
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MI->getOperand(MI->getNumOperands() - 1).getImm(),
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ShuffleMask);
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break;
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case X86::PSRLDQri:
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case X86::VPSRLDQri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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if (MI->getOperand(MI->getNumOperands() - 1).isImm())
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DecodePSRLDQMask(MVT::v16i8,
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MI->getOperand(MI->getNumOperands() - 1).getImm(),
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ShuffleMask);
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break;
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case X86::VPSRLDQYri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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if (MI->getOperand(MI->getNumOperands() - 1).isImm())
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DecodePSRLDQMask(MVT::v32i8,
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DecodePSRLDQMask(getRegOperandVectorVT(MI, MVT::i8, 0),
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MI->getOperand(MI->getNumOperands() - 1).getImm(),
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ShuffleMask);
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break;
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case X86::PALIGNR128rr:
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case X86::VPALIGNR128rr:
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case X86::VPALIGNR256rr:
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Src1Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::PALIGNR128rm:
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case X86::VPALIGNR128rm:
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Src2Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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if (MI->getOperand(MI->getNumOperands() - 1).isImm())
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DecodePALIGNRMask(MVT::v16i8,
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MI->getOperand(MI->getNumOperands() - 1).getImm(),
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ShuffleMask);
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break;
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case X86::VPALIGNR256rr:
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Src1Name = getRegName(MI->getOperand(2).getReg());
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// FALL THROUGH.
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case X86::VPALIGNR256rm:
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Src2Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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if (MI->getOperand(MI->getNumOperands() - 1).isImm())
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DecodePALIGNRMask(MVT::v32i8,
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DecodePALIGNRMask(getRegOperandVectorVT(MI, MVT::i8, 0),
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MI->getOperand(MI->getNumOperands() - 1).getImm(),
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ShuffleMask);
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break;
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