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Allow load from constant on SPU.

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A 'load <4 x i32>* null' crashes llc before this fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126995 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kalle Raiskila 2011-03-04 12:00:11 +00:00
parent 786792784e
commit 7f5de8b4c6
3 changed files with 21 additions and 1 deletions
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7
lib/Target/CellSPU/SPUISelDAGToDAG.cpp
View File

@ -321,12 +321,17 @@ SPUDAGToDAGISel::SelectAFormAddr(SDNode *Op, SDValue N, SDValue &Base,
// These match the addr256k operand type:
EVT OffsVT = MVT::i16;
SDValue Zero = CurDAG->getTargetConstant(0, OffsVT);
int64_t val;
switch (N.getOpcode()) {
case ISD::Constant:
val = dyn_cast<ConstantSDNode>(N.getNode())->getSExtValue();
Base = CurDAG->getTargetConstant( val , MVT::i32);
Index = Zero;
return true; break;
case ISD::ConstantPool:
case ISD::GlobalAddress:
report_fatal_error("SPU SelectAFormAddr: Constant/Pool/Global not lowered.");
report_fatal_error("SPU SelectAFormAddr: Pool/Global not lowered.");
/*NOTREACHED*/
case ISD::TargetConstant:

7
test/CodeGen/CellSPU/loads.ll
View File

@ -50,3 +50,10 @@ define i32 @load_misaligned( i32* %ptr ){
%rv = load i32* %ptr, align 2
ret i32 %rv
}
define <4 x i32> @load_null_vec( ) {
;CHECK: lqa
;CHECK: bi $lr
%rv = load <4 x i32>* null
ret <4 x i32> %rv
}

8
test/CodeGen/CellSPU/stores.ll
View File

@ -171,3 +171,11 @@ define void @store_v8( <8 x float> %val, <8 x float>* %ptr )
store <8 x float> %val, <8 x float>* %ptr
ret void
}
define void @store_null_vec( <4 x i32> %val ) {
; FIXME - this is for some reason compiled into a il+stqd, not a sta.
;CHECK: stqd
;CHECK: bi $lr
store <4 x i32> %val, <4 x i32>* null
ret void
}