diff --git a/lib/CodeGen/GlobalISel/Legalizer.cpp b/lib/CodeGen/GlobalISel/Legalizer.cpp
index 26f6e5faf47..8f3d341720b 100644
--- a/lib/CodeGen/GlobalISel/Legalizer.cpp
+++ b/lib/CodeGen/GlobalISel/Legalizer.cpp
@@ -94,10 +94,7 @@ bool Legalizer::combineExtracts(MachineInstr &MI, MachineRegisterInfo &MRI,
            "unexpected physical register in G_SEQUENCE");
 
     // Finally we can replace the uses.
-    for (auto &Use : MRI.use_operands(ExtractReg)) {
-      Changed = true;
-      Use.setReg(OrigReg);
-    }
+    MRI.replaceRegWith(ExtractReg, OrigReg);
   }
 
   if (AllDefsReplaced) {
diff --git a/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir b/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
index 7b79991aae2..a50cd0326bf 100644
--- a/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
+++ b/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
@@ -8,6 +8,7 @@
   define void @test_combines_3() { ret void }
   define void @test_combines_4() { ret void }
   define void @test_combines_5() { ret void }
+  define void @test_combines_6() { ret void }
 ...
 
 ---
@@ -107,3 +108,24 @@ body: |
     %4:_(s32) = G_EXTRACT %2, 32
     %5:_(s32) = G_ADD %3, %4
 ...
+
+---
+name:            test_combines_6
+body: |
+  bb.0:
+    liveins: %w0
+
+    ; CHECK-LABEL: name: test_combines_6
+    ; CHECK: %0(s32) = COPY %w0
+    %0:_(s32) = COPY %w0
+
+    ; Check that we replace all the uses of a G_EXTRACT.
+    ; CHECK-NOT: G_SEQUENCE
+    ; CHECK-NOT: G_EXTRACT
+    ; CHECK: %3(s32) = G_MUL %0, %0
+    ; CHECK: %4(s32) = G_ADD %0, %3
+    %1:_(s32) = G_SEQUENCE %0, 0
+    %2:_(s32) = G_EXTRACT %1, 0
+    %3:_(s32) = G_MUL %2, %2
+    %4:_(s32) = G_ADD %2, %3
+...