From 832003578edcf93c9ad6869ee40c70c3ce89f415 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 3 Aug 2003 15:48:55 +0000 Subject: [PATCH] Switch over to tablegen generated header files git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7512 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86.h | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h index 3decdfd2090..9cb15c383c6 100644 --- a/lib/Target/X86/X86.h +++ b/lib/Target/X86/X86.h @@ -13,7 +13,7 @@ class TargetMachine; class Pass; /// createX86SimpleInstructionSelector - This pass converts an LLVM function -/// into a machine code representation is a very simple peep-hole fashion. The +/// into a machine code representation in a very simple peep-hole fashion. The /// generated code sucks but the implementation is nice and simple. /// Pass *createX86SimpleInstructionSelector(TargetMachine &TM); @@ -42,18 +42,15 @@ Pass *createX86CodePrinterPass(std::ostream &o, TargetMachine &tm); /// Pass *createEmitX86CodeToMemory(); +// Defines symbolic names for X86 registers. This defines a mapping from +// register name to register number. +// +#include "X86GenRegisterNames.inc" + /// X86 namespace - This namespace contains all of the register and opcode enums /// used by the X86 backend. /// namespace X86 { - // Defines a large number of symbolic names for X86 registers. This defines a - // mapping from register name to register number. - // - enum Register { -#define R(ENUM, NAME, FLAGS, TSFLAGS, ALIAS_SET) ENUM, -#include "X86RegisterInfo.def" - }; - // This defines a large number of symbolic names for X86 instruction opcodes. enum Opcode { #define I(ENUM, NAME, BASEOPCODE, FLAGS, TSFLAGS, IMPDEFS, IMPUSES) ENUM,