From 84f60b7359e1aa90794bb19de2bbf4d25dc2f01d Mon Sep 17 00:00:00 2001
From: Evan Cheng <evan.cheng@apple.com>
Date: Thu, 27 May 2010 22:08:38 +0000
Subject: [PATCH] llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just
 mark it an error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104891 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp | 20 ++------------------
 test/CodeGen/ARM/inlineasm.ll               |  8 --------
 2 files changed, 2 insertions(+), 26 deletions(-)

diff --git a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
index 093f599a2b9..fc73938002d 100644
--- a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
+++ b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
@@ -1064,27 +1064,11 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
       printOperand(MI, OpNum, O);
       return false;
     case 'Q':
-      // Print the least significant half of a register pair.
-      if (TM.getTargetData()->isBigEndian())
-        break;
-      printOperand(MI, OpNum, O);
-      return false;
     case 'R':
-      // Print the most significant half of a register pair.
-      if (TM.getTargetData()->isLittleEndian())
-        break;
-      printOperand(MI, OpNum, O);
-      return false;
     case 'H':
-      break;
-    }
-    // Print the second half of a register pair (for 'Q', 'R' or 'H').
-    // Verify that this operand has two consecutive registers.
-    if (!MI->getOperand(OpNum).isReg() ||
-        OpNum+1 == MI->getNumOperands() ||
-        !MI->getOperand(OpNum+1).isReg())
+      llvm_unreachable("llvm does not support 'Q', 'R', and 'H' modifiers!");
       return true;
-    ++OpNum;
+    }
   }
 
   printOperand(MI, OpNum, O);
diff --git a/test/CodeGen/ARM/inlineasm.ll b/test/CodeGen/ARM/inlineasm.ll
index d522348ba99..cca3c696b4a 100644
--- a/test/CodeGen/ARM/inlineasm.ll
+++ b/test/CodeGen/ARM/inlineasm.ll
@@ -6,14 +6,6 @@ define i32 @test1(i32 %tmp54) {
 }
 
 define void @test2() {
-	%tmp1 = call i64 asm "ldmia $1!, {$0, ${0:H}}", "=r,=*r,1"( i32** null, i32* null )		; <i64> [#uses=2]
-	%tmp2 = lshr i64 %tmp1, 32		; <i64> [#uses=1]
-	%tmp3 = trunc i64 %tmp2 to i32		; <i32> [#uses=1]
-	%tmp4 = call i32 asm "pkhbt $0, $1, $2, lsl #16", "=r,r,r"( i32 0, i32 %tmp3 )		; <i32> [#uses=0]
-	ret void
-}
-
-define void @test3() {
 	tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 )
 	ret void
 }