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Also fold MOV8r0, MOV16r0, MOV32r0 + store to MOV8mi, MOV16mi, and MOV32mi.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26817 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-03-17 02:36:22 +00:00
parent 5bd4d48c24
commit 8586b953a0
1 changed files with 9 additions and 0 deletions
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9
lib/Target/X86/X86RegisterInfo.cpp
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@ -160,6 +160,11 @@ static MachineInstr *MakeMIInst(unsigned Opcode, unsigned FrameIndex,
return 0;
}
static MachineInstr *MakeM0Inst(unsigned Opcode, unsigned FrameIndex,
MachineInstr *MI) {
return addFrameReference(BuildMI(Opcode, 5), FrameIndex).addZImm(0);
}
static MachineInstr *MakeRMInst(unsigned Opcode, unsigned FrameIndex,
MachineInstr *MI) {
const MachineOperand& op = MI->getOperand(0);
@ -328,6 +333,10 @@ MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr* MI,
case X86::CMP8ri: return MakeMIInst(X86::CMP8mi , FrameIndex, MI);
case X86::CMP16ri: return MakeMIInst(X86::CMP16mi, FrameIndex, MI);
case X86::CMP32ri: return MakeMIInst(X86::CMP32mi, FrameIndex, MI);
// Alias instructions
case X86::MOV8r0: return MakeM0Inst(X86::MOV8mi, FrameIndex, MI);
case X86::MOV16r0: return MakeM0Inst(X86::MOV16mi, FrameIndex, MI);
case X86::MOV32r0: return MakeM0Inst(X86::MOV32mi, FrameIndex, MI);
// Alias scalar SSE instructions
case X86::FsMOVAPSrr: return MakeMRInst(X86::MOVSSmr, FrameIndex, MI);
case X86::FsMOVAPDrr: return MakeMRInst(X86::MOVSDmr, FrameIndex, MI);