mirror of
https://github.com/RPCS3/llvm.git
synced 2025-02-27 06:08:11 +00:00
Some formatting to keep Clang happy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159948 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
83cfff6229
commit
874b863f2a
@ -7300,8 +7300,8 @@ processInstruction(MCInst &Inst,
|
||||
if ((isARMLowRegister(Inst.getOperand(1).getReg()) &&
|
||||
isARMLowRegister(Inst.getOperand(2).getReg())) &&
|
||||
Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() &&
|
||||
(!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR ||
|
||||
inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR) &&
|
||||
((!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR) ||
|
||||
(inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR)) &&
|
||||
(!static_cast<ARMOperand*>(Operands[3])->isToken() ||
|
||||
!static_cast<ARMOperand*>(Operands[3])->getToken().equals_lower(".w"))) {
|
||||
unsigned NewOpc;
|
||||
@ -7339,8 +7339,8 @@ processInstruction(MCInst &Inst,
|
||||
isARMLowRegister(Inst.getOperand(2).getReg())) &&
|
||||
(Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() ||
|
||||
Inst.getOperand(0).getReg() == Inst.getOperand(2).getReg()) &&
|
||||
(!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR ||
|
||||
inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR) &&
|
||||
((!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR) ||
|
||||
(inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR)) &&
|
||||
(!static_cast<ARMOperand*>(Operands[3])->isToken() ||
|
||||
!static_cast<ARMOperand*>(Operands[3])->getToken().equals_lower(".w"))) {
|
||||
unsigned NewOpc;
|
||||
|
Loading…
x
Reference in New Issue
Block a user