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pre-RA-sched debug-only fix

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176638 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2013-03-07 19:21:08 +00:00
parent b6716187ca
commit 877fcf52d1
1 changed files with 4 additions and 2 deletions
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6
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
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@ -1360,8 +1360,10 @@ SUnit *ScheduleDAGRRList::PickNodeToScheduleBottomUp() {
SmallVector<unsigned, 4> LRegs;
if (!DelayForLiveRegsBottomUp(CurSU, LRegs))
break;
DEBUG(dbgs() << " Interfering reg " << TRI->getName(LRegs[0])
<< " SU #" << CurSU->NodeNum << '\n');
DEBUG(dbgs() << " Interfering reg " <<
(LRegs[0] == TRI->getNumRegs() ? "CallResource"
: TRI->getName(LRegs[0]))
<< " SU #" << CurSU->NodeNum << '\n');
std::pair<LRegsMapT::iterator, bool> LRegsPair =
LRegsMap.insert(std::make_pair(CurSU, LRegs));
if (LRegsPair.second) {