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include prune and JIT prune

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19814 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-01-24 18:45:41 +00:00
parent 01269524ce
commit 886470efec
1 changed files with 1 additions and 35 deletions
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36
lib/Target/Alpha/AlphaTargetMachine.cpp
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@ -1,4 +1,4 @@
//===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -------===// //===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
@ -12,14 +12,10 @@
#include "Alpha.h" #include "Alpha.h"
#include "AlphaTargetMachine.h" #include "AlphaTargetMachine.h"
#include "llvm/Module.h"
#include "llvm/CodeGen/IntrinsicLowering.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/Passes.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetMachineRegistry.h" #include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Transforms/Scalar.h" #include "llvm/Transforms/Scalar.h"
#include "llvm/Support/CommandLine.h"
#include <iostream> #include <iostream>
using namespace llvm; using namespace llvm;
@ -31,7 +27,6 @@ namespace {
AlphaTargetMachine::AlphaTargetMachine( const Module &M, IntrinsicLowering *IL) AlphaTargetMachine::AlphaTargetMachine( const Module &M, IntrinsicLowering *IL)
: TargetMachine("alpha", IL, true), : TargetMachine("alpha", IL, true),
FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) //TODO: check these FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) //TODO: check these
//JITInfo(*this)
{} {}
bool AlphaTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM, bool AlphaTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
@ -57,8 +52,6 @@ bool AlphaTargetMachine::addPassesToEmitAssembly(PassManager &PM,
// FIXME: Implement the switch instruction in the instruction selector! // FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass()); PM.add(createLowerSwitchPass());
PM.add(createLowerConstantExpressionsPass());
// Make sure that no unreachable blocks are instruction selected. // Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass()); PM.add(createUnreachableBlockEliminationPass());
@ -82,30 +75,3 @@ bool AlphaTargetMachine::addPassesToEmitAssembly(PassManager &PM,
PM.add(createMachineCodeDeleter()); PM.add(createMachineCodeDeleter());
return false; return false;
} }
//void AlphaJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// // FIXME: Implement efficient support for garbage collection intrinsics.
// PM.add(createLowerGCPass());
// // FIXME: Implement the invoke/unwind instructions!
// PM.add(createLowerInvokePass());
// // FIXME: Implement the switch instruction in the instruction selector!
// PM.add(createLowerSwitchPass());
// PM.add(createLowerConstantExpressionsPass());
// // Make sure that no unreachable blocks are instruction selected.
// PM.add(createUnreachableBlockEliminationPass());
// PM.add(createPPC32ISelSimple(TM));
// PM.add(createRegisterAllocator());
// PM.add(createPrologEpilogCodeInserter());
// // Must run branch selection immediately preceding the asm printer
// PM.add(createPPCBranchSelectionPass());
// if (PrintMachineCode)
// PM.add(createMachineFunctionPrinterPass(&std::cerr));
//}