diff --git a/test/CodeGen/SystemZ/branch-06.ll b/test/CodeGen/SystemZ/branch-06.ll
index 3854045e38f..5d6610afebf 100644
--- a/test/CodeGen/SystemZ/branch-06.ll
+++ b/test/CodeGen/SystemZ/branch-06.ll
@@ -2,7 +2,7 @@
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 
-declare i32 @foo();
+declare i32 @foo()
 
 define void @f1(i32 %target) {
 ; CHECK: f1:
diff --git a/test/CodeGen/SystemZ/branch-07.ll b/test/CodeGen/SystemZ/branch-07.ll
index 1cab6ff28ed..00e8b8a95f7 100644
--- a/test/CodeGen/SystemZ/branch-07.ll
+++ b/test/CodeGen/SystemZ/branch-07.ll
@@ -2,7 +2,7 @@
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 
-declare i64 @foo();
+declare i64 @foo()
 
 define void @f1(i64 %target) {
 ; CHECK: f1:
diff --git a/test/CodeGen/SystemZ/bswap-01.ll b/test/CodeGen/SystemZ/bswap-01.ll
index 952903df50f..23bc35ca48b 100644
--- a/test/CodeGen/SystemZ/bswap-01.ll
+++ b/test/CodeGen/SystemZ/bswap-01.ll
@@ -9,7 +9,7 @@ declare i64 @llvm.bswap.i64(i64 %a)
 define i32 @f1(i32 %a) {
 ; CHECK: f1:
 ; CHECK: lrvr [[REGISTER:%r[0-5]]], %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %swapped = call i32 @llvm.bswap.i32(i32 %a)
   ret i32 %swapped
 }
@@ -18,7 +18,7 @@ define i32 @f1(i32 %a) {
 define i64 @f2(i64 %a) {
 ; CHECK: f2:
 ; CHECK: lrvgr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %swapped = call i64 @llvm.bswap.i64(i64 %a)
   ret i64 %swapped
 }
diff --git a/test/CodeGen/SystemZ/fp-conv-08.ll b/test/CodeGen/SystemZ/fp-conv-08.ll
index 20c4e30f079..2cb97460a3e 100644
--- a/test/CodeGen/SystemZ/fp-conv-08.ll
+++ b/test/CodeGen/SystemZ/fp-conv-08.ll
@@ -17,7 +17,7 @@ define float @f1(i64 %i) {
 define double @f2(i64 %i) {
 ; CHECK: f2:
 ; CHECK: ldgr
-; CHECL: adbr
+; CHECK: adbr
 ; CHECK: br %r14
   %conv = uitofp i64 %i to double
   ret double %conv
diff --git a/test/CodeGen/SystemZ/int-conv-01.ll b/test/CodeGen/SystemZ/int-conv-01.ll
index 643ac6ae251..9724ee38d83 100644
--- a/test/CodeGen/SystemZ/int-conv-01.ll
+++ b/test/CodeGen/SystemZ/int-conv-01.ll
@@ -6,7 +6,7 @@
 define i32 @f1(i32 %a) {
 ; CHECK: f1:
 ; CHECK: lbr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %byte = trunc i32 %a to i8
   %ext = sext i8 %byte to i32
   ret i32 %ext
@@ -16,7 +16,7 @@ define i32 @f1(i32 %a) {
 define i32 @f2(i64 %a) {
 ; CHECK: f2:
 ; CHECK: lbr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %byte = trunc i64 %a to i8
   %ext = sext i8 %byte to i32
   ret i32 %ext
diff --git a/test/CodeGen/SystemZ/int-conv-02.ll b/test/CodeGen/SystemZ/int-conv-02.ll
index 86144d3e645..27a049fce39 100644
--- a/test/CodeGen/SystemZ/int-conv-02.ll
+++ b/test/CodeGen/SystemZ/int-conv-02.ll
@@ -6,7 +6,7 @@
 define i32 @f1(i32 %a) {
 ; CHECK: f1:
 ; CHECK: llcr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %byte = trunc i32 %a to i8
   %ext = zext i8 %byte to i32
   ret i32 %ext
@@ -16,7 +16,7 @@ define i32 @f1(i32 %a) {
 define i32 @f2(i64 %a) {
 ; CHECK: f2:
 ; CHECK: llcr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %byte = trunc i64 %a to i8
   %ext = zext i8 %byte to i32
   ret i32 %ext
@@ -26,7 +26,7 @@ define i32 @f2(i64 %a) {
 define i32 @f3(i32 %a) {
 ; CHECK: f3:
 ; CHECK: llcr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %ext = and i32 %a, 255
   ret i32 %ext
 }
diff --git a/test/CodeGen/SystemZ/int-conv-03.ll b/test/CodeGen/SystemZ/int-conv-03.ll
index 73b8dbb43a1..fae568d7bcc 100644
--- a/test/CodeGen/SystemZ/int-conv-03.ll
+++ b/test/CodeGen/SystemZ/int-conv-03.ll
@@ -6,7 +6,7 @@
 define i64 @f1(i32 %a) {
 ; CHECK: f1:
 ; CHECK: lgbr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %byte = trunc i32 %a to i8
   %ext = sext i8 %byte to i64
   ret i64 %ext
@@ -16,7 +16,7 @@ define i64 @f1(i32 %a) {
 define i64 @f2(i64 %a) {
 ; CHECK: f2:
 ; CHECK: lgbr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %byte = trunc i64 %a to i8
   %ext = sext i8 %byte to i64
   ret i64 %ext
diff --git a/test/CodeGen/SystemZ/int-conv-04.ll b/test/CodeGen/SystemZ/int-conv-04.ll
index 4cec5242e88..9ff3f58492c 100644
--- a/test/CodeGen/SystemZ/int-conv-04.ll
+++ b/test/CodeGen/SystemZ/int-conv-04.ll
@@ -6,7 +6,7 @@
 define i64 @f1(i32 %a) {
 ; CHECK: f1:
 ; CHECK: llgcr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %byte = trunc i32 %a to i8
   %ext = zext i8 %byte to i64
   ret i64 %ext
@@ -16,7 +16,7 @@ define i64 @f1(i32 %a) {
 define i64 @f2(i64 %a) {
 ; CHECK: f2:
 ; CHECK: llgcr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %byte = trunc i64 %a to i8
   %ext = zext i8 %byte to i64
   ret i64 %ext
@@ -26,7 +26,7 @@ define i64 @f2(i64 %a) {
 define i64 @f3(i64 %a) {
 ; CHECK: f3:
 ; CHECK: llgcr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %ext = and i64 %a, 255
   ret i64 %ext
 }
diff --git a/test/CodeGen/SystemZ/int-conv-05.ll b/test/CodeGen/SystemZ/int-conv-05.ll
index 5358f7d9228..99b7a09af43 100644
--- a/test/CodeGen/SystemZ/int-conv-05.ll
+++ b/test/CodeGen/SystemZ/int-conv-05.ll
@@ -6,7 +6,7 @@
 define i32 @f1(i32 %a) {
 ; CHECK: f1:
 ; CHECK: lhr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %half = trunc i32 %a to i16
   %ext = sext i16 %half to i32
   ret i32 %ext
@@ -16,7 +16,7 @@ define i32 @f1(i32 %a) {
 define i32 @f2(i64 %a) {
 ; CHECK: f2:
 ; CHECK: lhr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %half = trunc i64 %a to i16
   %ext = sext i16 %half to i32
   ret i32 %ext
diff --git a/test/CodeGen/SystemZ/int-conv-06.ll b/test/CodeGen/SystemZ/int-conv-06.ll
index 64af612d65f..dc9dcc7eb0e 100644
--- a/test/CodeGen/SystemZ/int-conv-06.ll
+++ b/test/CodeGen/SystemZ/int-conv-06.ll
@@ -6,7 +6,7 @@
 define i32 @f1(i32 %a) {
 ; CHECK: f1:
 ; CHECK: llhr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %half = trunc i32 %a to i16
   %ext = zext i16 %half to i32
   ret i32 %ext
@@ -16,7 +16,7 @@ define i32 @f1(i32 %a) {
 define i32 @f2(i64 %a) {
 ; CHECK: f2:
 ; CHECK: llhr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %half = trunc i64 %a to i16
   %ext = zext i16 %half to i32
   ret i32 %ext
@@ -26,7 +26,7 @@ define i32 @f2(i64 %a) {
 define i32 @f3(i32 %a) {
 ; CHECK: f3:
 ; CHECK: llhr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %ext = and i32 %a, 65535
   ret i32 %ext
 }
diff --git a/test/CodeGen/SystemZ/int-conv-07.ll b/test/CodeGen/SystemZ/int-conv-07.ll
index 041caa244c8..bb85fb9f2a2 100644
--- a/test/CodeGen/SystemZ/int-conv-07.ll
+++ b/test/CodeGen/SystemZ/int-conv-07.ll
@@ -6,7 +6,7 @@
 define i64 @f1(i64 %a) {
 ; CHECK: f1:
 ; CHECK: lghr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %half = trunc i64 %a to i16
   %ext = sext i16 %half to i64
   ret i64 %ext
@@ -16,7 +16,7 @@ define i64 @f1(i64 %a) {
 define i64 @f2(i32 %a) {
 ; CHECK: f2:
 ; CHECK: lghr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %half = trunc i32 %a to i16
   %ext = sext i16 %half to i64
   ret i64 %ext
diff --git a/test/CodeGen/SystemZ/int-conv-08.ll b/test/CodeGen/SystemZ/int-conv-08.ll
index 3d7f96675da..090cc754024 100644
--- a/test/CodeGen/SystemZ/int-conv-08.ll
+++ b/test/CodeGen/SystemZ/int-conv-08.ll
@@ -6,7 +6,7 @@
 define i64 @f1(i32 %a) {
 ; CHECK: f1:
 ; CHECK: llghr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %half = trunc i32 %a to i16
   %ext = zext i16 %half to i64
   ret i64 %ext
@@ -16,7 +16,7 @@ define i64 @f1(i32 %a) {
 define i64 @f2(i64 %a) {
 ; CHECK: f2:
 ; CHECK: llghr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %half = trunc i64 %a to i16
   %ext = zext i16 %half to i64
   ret i64 %ext
@@ -26,7 +26,7 @@ define i64 @f2(i64 %a) {
 define i64 @f3(i64 %a) {
 ; CHECK: f3:
 ; CHECK: llghr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %ext = and i64 %a, 65535
   ret i64 %ext
 }
diff --git a/test/CodeGen/SystemZ/int-conv-09.ll b/test/CodeGen/SystemZ/int-conv-09.ll
index 6e93886895d..f003c059eb3 100644
--- a/test/CodeGen/SystemZ/int-conv-09.ll
+++ b/test/CodeGen/SystemZ/int-conv-09.ll
@@ -6,7 +6,7 @@
 define i64 @f1(i32 %a) {
 ; CHECK: f1:
 ; CHECK: lgfr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %ext = sext i32 %a to i64
   ret i64 %ext
 }
@@ -15,7 +15,7 @@ define i64 @f1(i32 %a) {
 define i64 @f2(i64 %a) {
 ; CHECK: f2:
 ; CHECK: lgfr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %word = trunc i64 %a to i32
   %ext = sext i32 %word to i64
   ret i64 %ext
diff --git a/test/CodeGen/SystemZ/int-conv-10.ll b/test/CodeGen/SystemZ/int-conv-10.ll
index 918bc1de8fa..2b2a290af6b 100644
--- a/test/CodeGen/SystemZ/int-conv-10.ll
+++ b/test/CodeGen/SystemZ/int-conv-10.ll
@@ -6,7 +6,7 @@
 define i64 @f1(i32 %a) {
 ; CHECK: f1:
 ; CHECK: llgfr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %ext = zext i32 %a to i64
   ret i64 %ext
 }
@@ -15,7 +15,7 @@ define i64 @f1(i32 %a) {
 define i64 @f2(i64 %a) {
 ; CHECK: f2:
 ; CHECK: llgfr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %word = trunc i64 %a to i32
   %ext = zext i32 %word to i64
   ret i64 %ext
@@ -25,7 +25,7 @@ define i64 @f2(i64 %a) {
 define i64 @f3(i64 %a) {
 ; CHECK: f3:
 ; CHECK: llgfr %r2, %r2
-; CHECk: br %r14
+; CHECK: br %r14
   %ext = and i64 %a, 4294967295
   ret i64 %ext
 }