ARM VFP assembly parsing for VADD and VSUB two-operand forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144710 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-11-15 22:15:10 +00:00
parent 6cb4b08182
commit 88d012a9c3

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@ -1178,6 +1178,16 @@ def : VFP2InstAlias<"vmul${p}.f64 $Dn, $Dm",
(VMULD DPR:$Dn, DPR:$Dn, DPR:$Dm, pred:$p)>;
def : VFP2InstAlias<"vmul${p}.f32 $Sn, $Sm",
(VMULS SPR:$Sn, SPR:$Sn, SPR:$Sm, pred:$p)>;
// VADD has a two-operand form (implied destination operand)
def : VFP2InstAlias<"vadd${p}.f64 $Dn, $Dm",
(VADDD DPR:$Dn, DPR:$Dn, DPR:$Dm, pred:$p)>;
def : VFP2InstAlias<"vadd${p}.f32 $Sn, $Sm",
(VADDS SPR:$Sn, SPR:$Sn, SPR:$Sm, pred:$p)>;
// VSUB has a two-operand form (implied destination operand)
def : VFP2InstAlias<"vsub${p}.f64 $Dn, $Dm",
(VSUBD DPR:$Dn, DPR:$Dn, DPR:$Dm, pred:$p)>;
def : VFP2InstAlias<"vsub${p}.f32 $Sn, $Sm",
(VSUBS SPR:$Sn, SPR:$Sn, SPR:$Sm, pred:$p)>;
// VMOV can accept optional .f32/.f64 suffix.
def : VFP2InstAlias<"vmov${p}.f32 $Rt, $Sn",