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Revert r279242 - it's failing the tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279247 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov
parent
09091ea512
commit
8935d870ca
@ -26,86 +26,64 @@
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using namespace llvm;
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using namespace llvm;
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#define DEBUG_TYPE "msp430-branch-select"
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#define DEBUG_TYPE "msp430-branch-select"
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#define MSP430_BR_SELECT_NAME "MSP430 Branch Selector"
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static cl::opt<bool>
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BranchSelectEnabled("msp430-branch-select", cl::Hidden, cl::init(true),
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cl::desc("Expand out of range branches"));
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STATISTIC(NumSplit, "Number of machine basic blocks split");
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STATISTIC(NumExpanded, "Number of branches expanded to long format");
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STATISTIC(NumExpanded, "Number of branches expanded to long format");
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namespace {
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namespace {
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class MSP430BSel : public MachineFunctionPass {
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struct MSP430BSel : public MachineFunctionPass {
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static char ID;
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MSP430BSel() : MachineFunctionPass(ID) {}
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typedef SmallVector<int, 16> OffsetVector;
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/// BlockSizes - The sizes of the basic blocks in the function.
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std::vector<unsigned> BlockSizes;
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MachineFunction *MF;
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bool runOnMachineFunction(MachineFunction &Fn) override;
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const MSP430InstrInfo *TII;
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unsigned measureFunction(OffsetVector &BlockOffsets,
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MachineFunctionProperties getRequiredProperties() const override {
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MachineBasicBlock *FromBB = nullptr);
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return MachineFunctionProperties().set(
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bool expandBranches(OffsetVector &BlockOffsets);
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MachineFunctionProperties::Property::AllVRegsAllocated);
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public:
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static char ID;
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MSP430BSel() : MachineFunctionPass(ID) {}
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bool runOnMachineFunction(MachineFunction &MF) override;
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MachineFunctionProperties getRequiredProperties() const override {
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return MachineFunctionProperties().set(
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MachineFunctionProperties::Property::AllVRegsAllocated);
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}
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const char *getPassName() const override { return MSP430_BR_SELECT_NAME; }
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};
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char MSP430BSel::ID = 0;
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}
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static bool isInRage(int DistanceInBytes) {
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// According to CC430 Family User's Guide, Section 4.5.1.3, branch
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// instructions have the signed 10-bit word offset field, so first we need to
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// convert the distance from bytes to words, then check if it fits in 10-bit
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// signed integer.
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const int WordSize = 2;
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assert((DistanceInBytes % WordSize == 0) &&
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"Branch offset should be word aligned!");
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int Words = DistanceInBytes / WordSize;
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return isInt<10>(Words);
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}
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/// Measure each basic block, fill the BlockOffsets, and return the size of
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/// the function, starting with BB
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unsigned MSP430BSel::measureFunction(OffsetVector &BlockOffsets,
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MachineBasicBlock *FromBB) {
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// Give the blocks of the function a dense, in-order, numbering.
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MF->RenumberBlocks(FromBB);
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MachineFunction::iterator Begin;
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if (FromBB == nullptr) {
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Begin = MF->begin();
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} else {
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Begin = FromBB->getIterator();
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}
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BlockOffsets.resize(MF->getNumBlockIDs());
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unsigned TotalSize = BlockOffsets[Begin->getNumber()];
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for (auto &MBB : make_range(Begin, MF->end())) {
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BlockOffsets[MBB.getNumber()] = TotalSize;
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for (MachineInstr &MI : MBB) {
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TotalSize += TII->getInstSizeInBytes(MI);
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}
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}
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}
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return TotalSize;
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const char *getPassName() const override {
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return "MSP430 Branch Selector";
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}
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};
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char MSP430BSel::ID = 0;
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}
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}
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/// Do expand branches and split the basic blocks if necessary.
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/// createMSP430BranchSelectionPass - returns an instance of the Branch
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/// Returns true if made any change.
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/// Selection Pass
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bool MSP430BSel::expandBranches(OffsetVector &BlockOffsets) {
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///
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FunctionPass *llvm::createMSP430BranchSelectionPass() {
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return new MSP430BSel();
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}
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bool MSP430BSel::runOnMachineFunction(MachineFunction &Fn) {
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const MSP430InstrInfo *TII =
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static_cast<const MSP430InstrInfo *>(Fn.getSubtarget().getInstrInfo());
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// Give the blocks of the function a dense, in-order, numbering.
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Fn.RenumberBlocks();
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BlockSizes.resize(Fn.getNumBlockIDs());
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// Measure each MBB and compute a size for the entire function.
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unsigned FuncSize = 0;
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for (MachineBasicBlock &MBB : Fn) {
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unsigned BlockSize = 0;
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for (MachineInstr &MI : MBB)
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BlockSize += TII->getInstSizeInBytes(MI);
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BlockSizes[MBB.getNumber()] = BlockSize;
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FuncSize += BlockSize;
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}
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// If the entire function is smaller than the displacement of a branch field,
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// we know we don't need to shrink any branches in this function. This is a
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// common case.
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if (FuncSize < (1 << 9)) {
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BlockSizes.clear();
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return false;
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}
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// For each conditional branch, if the offset to its destination is larger
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// For each conditional branch, if the offset to its destination is larger
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// than the offset field allows, transform it into a long branch sequence
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// than the offset field allows, transform it into a long branch sequence
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// like this:
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// like this:
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@ -115,143 +93,91 @@ bool MSP430BSel::expandBranches(OffsetVector &BlockOffsets) {
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// b!CC $PC+6
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// b!CC $PC+6
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// b MBB
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// b MBB
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//
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//
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bool MadeChange = false;
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bool MadeChange = true;
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for (auto MBB = MF->begin(), E = MF->end(); MBB != E; ++MBB) {
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bool EverMadeChange = false;
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unsigned MBBStartOffset = 0;
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while (MadeChange) {
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for (auto MI = MBB->begin(), EE = MBB->end(); MI != EE; ++MI) {
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// Iteratively expand branches until we reach a fixed point.
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MBBStartOffset += TII->getInstSizeInBytes(*MI);
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MadeChange = false;
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// If this instruction is not a short branch then skip it.
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for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
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if (MI->getOpcode() != MSP430::JCC && MI->getOpcode() != MSP430::JMP) {
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++MFI) {
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continue;
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MachineBasicBlock &MBB = *MFI;
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}
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unsigned MBBStartOffset = 0;
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
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MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
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I != E; ++I) {
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// Determine the distance from the current branch to the destination
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if ((I->getOpcode() != MSP430::JCC || I->getOperand(0).isImm()) &&
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// block. MBBStartOffset already includes the size of the current branch
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I->getOpcode() != MSP430::JMP) {
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// instruction.
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MBBStartOffset += TII->getInstSizeInBytes(*I);
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int BlockDistance =
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continue;
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BlockOffsets[DestBB->getNumber()] - BlockOffsets[MBB->getNumber()];
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int BranchDistance = BlockDistance - MBBStartOffset;
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// If this branch is in range, ignore it.
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if (isInRage(BranchDistance)) {
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continue;
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}
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DEBUG(dbgs() << " Found a branch that needs expanding, BB#"
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<< DestBB->getNumber() << ", Distance " << BranchDistance
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<< "\n");
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// If JCC is not the last instruction we need to split the MBB.
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if (MI->getOpcode() == MSP430::JCC && std::next(MI) != EE) {
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DEBUG(dbgs() << " Found a basic block that needs to be split, BB#"
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<< MBB->getNumber() << "\n");
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// Create a new basic block.
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MachineBasicBlock *NewBB =
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MF->CreateMachineBasicBlock(MBB->getBasicBlock());
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MF->insert(std::next(MBB), NewBB);
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// Splice the instructions following MI over to the NewBB.
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NewBB->splice(NewBB->end(), &*MBB, std::next(MI), MBB->end());
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// Update the successor lists.
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for (MachineBasicBlock *Succ : MBB->successors()) {
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if (Succ == DestBB) {
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continue;
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}
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MBB->replaceSuccessor(Succ, NewBB);
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NewBB->addSuccessor(Succ);
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}
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}
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// We introduced a new MBB so all following blocks should be numbered
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// Determine the offset from the current branch to the destination
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// and measured again.
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// block.
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measureFunction(BlockOffsets, &*MBB);
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MachineBasicBlock *Dest = I->getOperand(0).getMBB();
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++NumSplit;
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int BranchSize;
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if (Dest->getNumber() <= MBB.getNumber()) {
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// If this is a backwards branch, the delta is the offset from the
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// start of this block to this branch, plus the sizes of all blocks
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// from this block to the dest.
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BranchSize = MBBStartOffset;
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// It may be not necessary to start all over at this point, but it's
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for (unsigned i = Dest->getNumber(), e = MBB.getNumber(); i != e; ++i)
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// safer do this anyway.
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BranchSize += BlockSizes[i];
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return true;
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} else {
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// Otherwise, add the size of the blocks between this block and the
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// dest to the number of bytes left in this block.
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BranchSize = -MBBStartOffset;
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for (unsigned i = MBB.getNumber(), e = Dest->getNumber(); i != e; ++i)
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BranchSize += BlockSizes[i];
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}
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// If this branch is in range, ignore it.
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if (isInt<10>(BranchSize)) {
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MBBStartOffset += 2;
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continue;
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}
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// Otherwise, we have to expand it to a long branch.
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unsigned NewSize;
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MachineInstr &OldBranch = *I;
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DebugLoc dl = OldBranch.getDebugLoc();
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if (I->getOpcode() == MSP430::JMP) {
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NewSize = 4;
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} else {
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// The BCC operands are:
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// 0. MSP430 branch predicate
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// 1. Target MBB
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SmallVector<MachineOperand, 1> Cond;
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Cond.push_back(I->getOperand(1));
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// Jump over the uncond branch inst (i.e. $+6) on opposite condition.
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TII->ReverseBranchCondition(Cond);
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BuildMI(MBB, I, dl, TII->get(MSP430::JCC))
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.addImm(4).addOperand(Cond[0]);
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NewSize = 6;
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}
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// Uncond branch to the real destination.
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I = BuildMI(MBB, I, dl, TII->get(MSP430::Bi)).addMBB(Dest);
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// Remove the old branch from the function.
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OldBranch.eraseFromParent();
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// Remember that this instruction is NewSize bytes, increase the size of the
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// block by NewSize-2, remember to iterate.
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BlockSizes[MBB.getNumber()] += NewSize-2;
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MBBStartOffset += NewSize;
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++NumExpanded;
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MadeChange = true;
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}
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}
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MachineInstr &OldBranch = *MI;
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DebugLoc dl = OldBranch.getDebugLoc();
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int InstrSizeDiff = -TII->getInstSizeInBytes(OldBranch);
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if (MI->getOpcode() == MSP430::JCC) {
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MachineBasicBlock *NextMBB = &*std::next(MBB);
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assert(MBB->isSuccessor(NextMBB) &&
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"This block must have a layout successor!");
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// The BCC operands are:
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// 0. Target MBB
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// 1. MSP430 branch predicate
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SmallVector<MachineOperand, 1> Cond;
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Cond.push_back(MI->getOperand(1));
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// Jump over the long branch on the opposite condition
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TII->ReverseBranchCondition(Cond);
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auto &NewInstr = BuildMI(*MBB, MI, dl, TII->get(MSP430::JCC))
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.addMBB(NextMBB)
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.addOperand(Cond[0]);
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InstrSizeDiff += TII->getInstSizeInBytes(*NewInstr);
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}
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// Unconditional branch to the real destination.
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MI = BuildMI(*MBB, MI, dl, TII->get(MSP430::Bi)).addMBB(DestBB);
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InstrSizeDiff += TII->getInstSizeInBytes(*MI);
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// Remove the old branch from the function.
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OldBranch.eraseFromParent();
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// The size of a new instruction is different from the old one, so we need
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// to correct all block offsets.
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for (int i = MBB->getNumber() + 1, e = BlockOffsets.size(); i < e; ++i) {
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BlockOffsets[i] += InstrSizeDiff;
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}
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MBBStartOffset += InstrSizeDiff;
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++NumExpanded;
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MadeChange = true;
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}
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}
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}
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EverMadeChange |= MadeChange;
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return MadeChange;
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}
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bool MSP430BSel::runOnMachineFunction(MachineFunction &mf) {
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MF = &mf;
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TII = static_cast<const MSP430InstrInfo *>(MF->getSubtarget().getInstrInfo());
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// If the pass is disabled, just bail early.
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if (!BranchSelectEnabled)
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return false;
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DEBUG(dbgs() << "\n********** " MSP430_BR_SELECT_NAME " **********\n");
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// BlockOffsets - Contains the distance from the beginning of the function to
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// the beginning of each basic block.
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OffsetVector BlockOffsets;
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unsigned FunctionSize = measureFunction(BlockOffsets);
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// If the entire function is smaller than the displacement of a branch field,
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// we know we don't need to expand any branches in this
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// function. This is a common case.
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if (isInRage(FunctionSize)) {
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return false;
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}
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}
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// Iteratively expand branches until we reach a fixed point.
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BlockSizes.clear();
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bool MadeChange = false;
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return true;
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while (expandBranches(BlockOffsets))
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MadeChange = true;
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return MadeChange;
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}
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/// Returns an instance of the Branch Selection Pass
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FunctionPass *llvm::createMSP430BranchSelectionPass() {
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return new MSP430BSel();
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}
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}
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@ -1,588 +0,0 @@
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; RUN: llc < %s -march=msp430 | FileCheck %s
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target datalayout = "e-m:e-p:16:16-i32:16:32-a:16-n8:16"
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target triple = "msp430"
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@reg = common global i16 0, align 2
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define void @WriteBurstPATable(i16 %count) #0 {
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entry:
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br label %while.cond
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while.cond:
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store volatile i16 11, i16* @reg, align 2
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store volatile i16 13, i16* @reg, align 2
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store volatile i16 17, i16* @reg, align 2
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store volatile i16 11, i16* @reg, align 2
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store volatile i16 13, i16* @reg, align 2
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store volatile i16 17, i16* @reg, align 2
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store volatile i16 11, i16* @reg, align 2
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store volatile i16 13, i16* @reg, align 2
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store volatile i16 17, i16* @reg, align 2
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store volatile i16 11, i16* @reg, align 2
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store volatile i16 13, i16* @reg, align 2
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store volatile i16 17, i16* @reg, align 2
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store volatile i16 11, i16* @reg, align 2
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store volatile i16 13, i16* @reg, align 2
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store volatile i16 17, i16* @reg, align 2
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store volatile i16 11, i16* @reg, align 2
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store volatile i16 13, i16* @reg, align 2
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||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
%v0 = load volatile i16, i16* @reg, align 2
|
|
||||||
%lnot = icmp eq i16 %v0, 0
|
|
||||||
|
|
||||||
; This BB should be split and all branches should be expanded.
|
|
||||||
; CHECK-LABEL: .LBB0_1:
|
|
||||||
; CHECK: jne .LBB0_2
|
|
||||||
; CHECK: br #.LBB0_1
|
|
||||||
; CHECK: .LBB0_2:
|
|
||||||
; CHECK: br #.LBB0_4
|
|
||||||
; CHECK: .LBB0_3:
|
|
||||||
|
|
||||||
br i1 %lnot, label %while.cond, label %while.end
|
|
||||||
|
|
||||||
while.end:
|
|
||||||
%i.0.i.0.1822 = load volatile i16, i16* @reg, align 1
|
|
||||||
%cmp23 = icmp ult i16 %i.0.i.0.1822, %count
|
|
||||||
br i1 %cmp23, label %for.body, label %for.end
|
|
||||||
|
|
||||||
for.body:
|
|
||||||
br label %while.cond6
|
|
||||||
|
|
||||||
while.cond6:
|
|
||||||
%0 = load volatile i16, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 19, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
br label %for.inc
|
|
||||||
|
|
||||||
for.inc:
|
|
||||||
%1 = load volatile i16, i16* @reg, align 2
|
|
||||||
%cmp = icmp ult i16 %1, %count
|
|
||||||
|
|
||||||
; This branch should be expanded.
|
|
||||||
; CHECK-LABEL: .LBB0_4:
|
|
||||||
; CHECK: jhs .LBB0_5
|
|
||||||
; CHECK: br #.LBB0_3
|
|
||||||
; CHECK: .LBB0_5:
|
|
||||||
|
|
||||||
br i1 %cmp, label %for.body, label %for.end
|
|
||||||
|
|
||||||
for.end:
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
define void @WriteSinglePATable() #0 {
|
|
||||||
entry:
|
|
||||||
br label %begin
|
|
||||||
begin:
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
store volatile i16 13, i16* @reg, align 2
|
|
||||||
store volatile i16 17, i16* @reg, align 2
|
|
||||||
store volatile i16 11, i16* @reg, align 2
|
|
||||||
%v2 = load volatile i16, i16* @reg, align 2
|
|
||||||
%lnot = icmp eq i16 %v2, 0
|
|
||||||
|
|
||||||
; This branch should not be expanded
|
|
||||||
; CHECK-LABEL: .LBB1_1:
|
|
||||||
; CHECK: jeq .LBB1_1
|
|
||||||
; CHECK: BB#2:
|
|
||||||
; CHECK: ret
|
|
||||||
br i1 %lnot, label %begin, label %end
|
|
||||||
|
|
||||||
end:
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
Loading…
x
Reference in New Issue
Block a user