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Move getMatchingSuperReg() out of coalescer and into TargetRegisterInfo.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70309 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-04-28 18:29:27 +00:00
parent 85f74f817a
commit 8a8a0dfc3b
2 changed files with 14 additions and 16 deletions
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10
include/llvm/Target/TargetRegisterInfo.h
View File

@ -476,6 +476,16 @@ public:
/// exist. /// exist.
virtual unsigned getSubReg(unsigned RegNo, unsigned Index) const = 0; virtual unsigned getSubReg(unsigned RegNo, unsigned Index) const = 0;
/// getMatchingSuperReg - Return a super-register of the specified register
/// Reg so its sub-register of index SubIdx is Reg.
unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
const TargetRegisterClass *RC) const {
for (const unsigned *SRs = getSuperRegisters(Reg); unsigned SR = *SRs;++SRs)
if (Reg == getSubReg(SR, SubIdx) && RC->contains(SR))
return SR;
return 0;
}
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Register Class Information // Register Class Information
// //

20
lib/CodeGen/SimpleRegisterCoalescing.cpp
View File

@ -1000,18 +1000,6 @@ void SimpleRegisterCoalescing::RemoveCopiesFromValNo(LiveInterval &li,
} }
} }
/// getMatchingSuperReg - Return a super-register of the specified register
/// Reg so its sub-register of index SubIdx is Reg.
static unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
const TargetRegisterClass *RC,
const TargetRegisterInfo* TRI) {
for (const unsigned *SRs = TRI->getSuperRegisters(Reg);
unsigned SR = *SRs; ++SRs)
if (Reg == TRI->getSubReg(SR, SubIdx) && RC->contains(SR))
return SR;
return 0;
}
/// isWinToJoinCrossClass - Return true if it's profitable to coalesce /// isWinToJoinCrossClass - Return true if it's profitable to coalesce
/// two virtual registers from different register classes. /// two virtual registers from different register classes.
bool bool
@ -1064,7 +1052,7 @@ SimpleRegisterCoalescing::HasIncompatibleSubRegDefUse(MachineInstr *CopyMI,
TargetRegisterInfo::isPhysicalRegister(SrcReg) TargetRegisterInfo::isPhysicalRegister(SrcReg)
? tri_->getPhysicalRegisterRegClass(SrcReg) ? tri_->getPhysicalRegisterRegClass(SrcReg)
: mri_->getRegClass(SrcReg); : mri_->getRegClass(SrcReg);
if (!getMatchingSuperReg(PhysReg, SubIdx, RC, tri_)) if (!tri_->getMatchingSuperReg(PhysReg, SubIdx, RC))
return true; return true;
} }
} }
@ -1080,7 +1068,7 @@ SimpleRegisterCoalescing::HasIncompatibleSubRegDefUse(MachineInstr *CopyMI,
TargetRegisterInfo::isPhysicalRegister(DstReg) TargetRegisterInfo::isPhysicalRegister(DstReg)
? tri_->getPhysicalRegisterRegClass(DstReg) ? tri_->getPhysicalRegisterRegClass(DstReg)
: mri_->getRegClass(DstReg); : mri_->getRegClass(DstReg);
if (!getMatchingSuperReg(PhysReg, SubIdx, RC, tri_)) if (!tri_->getMatchingSuperReg(PhysReg, SubIdx, RC))
return true; return true;
} }
} }
@ -1097,7 +1085,7 @@ SimpleRegisterCoalescing::CanJoinExtractSubRegToPhysReg(unsigned DstReg,
unsigned SrcReg, unsigned SubIdx, unsigned SrcReg, unsigned SubIdx,
unsigned &RealDstReg) { unsigned &RealDstReg) {
const TargetRegisterClass *RC = mri_->getRegClass(SrcReg); const TargetRegisterClass *RC = mri_->getRegClass(SrcReg);
RealDstReg = getMatchingSuperReg(DstReg, SubIdx, RC, tri_); RealDstReg = tri_->getMatchingSuperReg(DstReg, SubIdx, RC);
assert(RealDstReg && "Invalid extract_subreg instruction!"); assert(RealDstReg && "Invalid extract_subreg instruction!");
// For this type of EXTRACT_SUBREG, conservatively // For this type of EXTRACT_SUBREG, conservatively
@ -1127,7 +1115,7 @@ SimpleRegisterCoalescing::CanJoinInsertSubRegToPhysReg(unsigned DstReg,
unsigned SrcReg, unsigned SubIdx, unsigned SrcReg, unsigned SubIdx,
unsigned &RealSrcReg) { unsigned &RealSrcReg) {
const TargetRegisterClass *RC = mri_->getRegClass(DstReg); const TargetRegisterClass *RC = mri_->getRegClass(DstReg);
RealSrcReg = getMatchingSuperReg(SrcReg, SubIdx, RC, tri_); RealSrcReg = tri_->getMatchingSuperReg(SrcReg, SubIdx, RC);
assert(RealSrcReg && "Invalid extract_subreg instruction!"); assert(RealSrcReg && "Invalid extract_subreg instruction!");
LiveInterval &RHS = li_->getInterval(DstReg); LiveInterval &RHS = li_->getInterval(DstReg);