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Strip trailing whitespace and reword explanatory comment.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234078 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2015-04-04 02:26:47 +00:00
parent b1ff87ec86
commit 8bc9aa92aa
1 changed files with 5 additions and 10 deletions
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15
test/CodeGen/PowerPC/fast-isel-load-store-vsx.ll
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@ -1,15 +1,12 @@
;; There are some known limitations in the VSX support during FastIsel
;; (see fast-isel-load-store.ll header). Nevertheless, we are adding some
;; regressions here for bugs we fix in the meantime
; RUN: llc < %s -O0 -fast-isel -mattr=+vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64VSX
;; The semantics of VSX stores for when R0 is used is different depending on
;; whether it is used as base or offset. If used as base, the effective
;; address computation will use zero regardless the content of R0. If used as
;; offset, the content will be used in the effective address. We observed that
;; address computation will use zero regardless of the content of R0. If used as
;; an offset the content will be used in the effective address. We observed that
;; for some constructors, the initialization values were being stored without
;; any offset register being specified which was causing R0 to be used as offset
;; in regions where it contained the value in the link register. This regression
;; an offset register being specified which was causing R0 to be used as offset
;; in regions where it contained the value in the link register. This test
;; verifies that R0 is used as base in these situations.
%SomeStruct = type { double }
@ -28,6 +25,4 @@ entry:
%0 = load double, double* %V.addr, align 8
store double %0, double* %Val, align 8
ret void
}
}