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Convert these cases to patterns

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23811 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-10-19 01:38:02 +00:00
parent 0c0cfa741f
commit 8be1fa5dc5
2 changed files with 11 additions and 37 deletions
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28
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
View File

@ -1211,34 +1211,6 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
// Other cases are autogenerated.
break;
case ISD::TRUNCATE: {
assert(N->getValueType(0) == MVT::i32 &&
N->getOperand(0).getValueType() == MVT::i64 &&
"TRUNCATE only supported for i64 -> i32");
SDOperand Op0 = Select(N->getOperand(0));
CurDAG->SelectNodeTo(N, PPC::OR8To4, MVT::i32, Op0, Op0);
break;
}
case ISD::ANY_EXTEND:
switch(N->getValueType(0)) {
default: assert(0 && "Unhandled type in ANY_EXTEND");
case MVT::i64: {
SDOperand Op0 = Select(N->getOperand(0));
CurDAG->SelectNodeTo(N, PPC::OR4To8, MVT::i64, Op0, Op0);
break;
}
}
return SDOperand(N, 0);
case ISD::ZERO_EXTEND: {
assert(N->getValueType(0) == MVT::i64 &&
N->getOperand(0).getValueType() == MVT::i32 &&
"ZERO_EXTEND only supported for i32 -> i64");
SDOperand Op0 = Select(N->getOperand(0));
Op0 = CurDAG->getTargetNode(PPC::OR4To8, MVT::i64, Op0, Op0);
CurDAG->SelectNodeTo(N, PPC::RLDICL, MVT::i64, Op0, getI32Imm(0),
getI32Imm(32));
return SDOperand(N, 0);
}
case ISD::SHL: {
unsigned Imm, SH, MB, ME;
if (isOpcWithIntImmediate(N->getOperand(0).Val, ISD::AND, Imm) &&

20
lib/Target/PowerPC/PPCInstrInfo.td
View File

@ -18,14 +18,8 @@ include "PPCInstrFormats.td"
//===----------------------------------------------------------------------===//
// PowerPC specific transformation functions and pattern fragments.
//
def GET_ZERO : SDNodeXForm<imm, [{
// Transformation function: get the low 16 bits.
return getI32Imm(0);
}]>;
def GET_32 : SDNodeXForm<imm, [{
// Transformation function: get the low 16 bits.
return getI32Imm(32);
}]>;
def GET_ZERO : SDNodeXForm<add, [{return getI32Imm(0);}]>; // HACK
def GET_32 : SDNodeXForm<add, [{ return getI32Imm(32);}]>; // HACK
def LO16 : SDNodeXForm<imm, [{
// Transformation function: get the low 16 bits.
@ -716,7 +710,15 @@ def : Pat<(or GPRC:$in, imm:$imm),
// XOR an arbitrary immediate.
def : Pat<(xor GPRC:$in, imm:$imm),
(XORIS (XORI GPRC:$in, (LO16 imm:$imm)), (HI16 imm:$imm))>;
def : Pat<(zext GPRC:$in),
(RLDICL (OR4To8 GPRC:$in, GPRC:$in), (GET_ZERO imm:$in),
(GET_32 imm:$in))>;
def : Pat<(anyext GPRC:$in),
(OR4To8 GPRC:$in, GPRC:$in)>;
def : Pat<(trunc G8RC:$in),
(OR8To4 G8RC:$in, G8RC:$in)>;
// Same as above, but using a temporary. FIXME: implement temporaries :)
/*
def : Pattern<(xor GPRC:$in, imm:$imm),