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[X86][AVX1] Improve 256-bit vector costs for integer unary intrinsics.
Account for subvector extraction/insertion, helps prevent the vectorizers from selecting 256-bit vectors that will have to be split anyhow on AVX1 targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302378 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim
parent
33aa99e46a
commit
8d84aa2cce
@ -1426,25 +1426,25 @@ int X86TTIImpl::getIntrinsicInstrCost(Intrinsic::ID IID, Type *RetTy,
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{ ISD::FSQRT, MVT::v4f64, 28 }, // Haswell from http://www.agner.org/
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};
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static const CostTblEntry AVX1CostTbl[] = {
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{ ISD::BITREVERSE, MVT::v4i64, 10 },
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{ ISD::BITREVERSE, MVT::v8i32, 10 },
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{ ISD::BITREVERSE, MVT::v16i16, 10 },
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{ ISD::BITREVERSE, MVT::v32i8, 10 },
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{ ISD::BITREVERSE, MVT::v4i64, 12 }, // 2 x 128-bit Op + extract/insert
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{ ISD::BITREVERSE, MVT::v8i32, 12 }, // 2 x 128-bit Op + extract/insert
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{ ISD::BITREVERSE, MVT::v16i16, 12 }, // 2 x 128-bit Op + extract/insert
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{ ISD::BITREVERSE, MVT::v32i8, 12 }, // 2 x 128-bit Op + extract/insert
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{ ISD::BSWAP, MVT::v4i64, 4 },
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{ ISD::BSWAP, MVT::v8i32, 4 },
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{ ISD::BSWAP, MVT::v16i16, 4 },
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{ ISD::CTLZ, MVT::v4i64, 46 },
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{ ISD::CTLZ, MVT::v8i32, 36 },
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{ ISD::CTLZ, MVT::v16i16, 28 },
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{ ISD::CTLZ, MVT::v32i8, 18 },
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{ ISD::CTPOP, MVT::v4i64, 14 },
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{ ISD::CTPOP, MVT::v8i32, 22 },
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{ ISD::CTPOP, MVT::v16i16, 18 },
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{ ISD::CTPOP, MVT::v32i8, 12 },
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{ ISD::CTTZ, MVT::v4i64, 20 },
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{ ISD::CTTZ, MVT::v8i32, 28 },
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{ ISD::CTTZ, MVT::v16i16, 24 },
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{ ISD::CTTZ, MVT::v32i8, 18 },
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{ ISD::CTLZ, MVT::v4i64, 48 }, // 2 x 128-bit Op + extract/insert
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{ ISD::CTLZ, MVT::v8i32, 38 }, // 2 x 128-bit Op + extract/insert
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{ ISD::CTLZ, MVT::v16i16, 30 }, // 2 x 128-bit Op + extract/insert
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{ ISD::CTLZ, MVT::v32i8, 20 }, // 2 x 128-bit Op + extract/insert
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{ ISD::CTPOP, MVT::v4i64, 16 }, // 2 x 128-bit Op + extract/insert
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{ ISD::CTPOP, MVT::v8i32, 24 }, // 2 x 128-bit Op + extract/insert
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{ ISD::CTPOP, MVT::v16i16, 20 }, // 2 x 128-bit Op + extract/insert
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{ ISD::CTPOP, MVT::v32i8, 14 }, // 2 x 128-bit Op + extract/insert
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{ ISD::CTTZ, MVT::v4i64, 22 }, // 2 x 128-bit Op + extract/insert
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{ ISD::CTTZ, MVT::v8i32, 30 }, // 2 x 128-bit Op + extract/insert
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{ ISD::CTTZ, MVT::v16i16, 26 }, // 2 x 128-bit Op + extract/insert
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{ ISD::CTTZ, MVT::v32i8, 20 }, // 2 x 128-bit Op + extract/insert
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{ ISD::FSQRT, MVT::f32, 14 }, // SNB from http://www.agner.org/
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{ ISD::FSQRT, MVT::v4f32, 14 }, // SNB from http://www.agner.org/
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{ ISD::FSQRT, MVT::v8f32, 28 }, // SNB from http://www.agner.org/
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@ -79,7 +79,7 @@ define <4 x i64> @var_bitreverse_v4i64(<4 x i64> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_bitreverse_v4i64':
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; SSE2: Found an estimated cost of 58 for instruction: %bitreverse
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; SSE42: Found an estimated cost of 10 for instruction: %bitreverse
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; AVX: Found an estimated cost of 10 for instruction: %bitreverse
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; AVX: Found an estimated cost of 12 for instruction: %bitreverse
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; AVX2: Found an estimated cost of 5 for instruction: %bitreverse
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; XOP: Found an estimated cost of 4 for instruction: %bitreverse
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%bitreverse = call <4 x i64> @llvm.bitreverse.v4i64(<4 x i64> %a)
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@ -101,7 +101,7 @@ define <8 x i32> @var_bitreverse_v8i32(<8 x i32> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_bitreverse_v8i32':
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; SSE2: Found an estimated cost of 54 for instruction: %bitreverse
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; SSE42: Found an estimated cost of 10 for instruction: %bitreverse
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; AVX: Found an estimated cost of 10 for instruction: %bitreverse
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; AVX: Found an estimated cost of 12 for instruction: %bitreverse
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; AVX2: Found an estimated cost of 5 for instruction: %bitreverse
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; XOP: Found an estimated cost of 4 for instruction: %bitreverse
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%bitreverse = call <8 x i32> @llvm.bitreverse.v8i32(<8 x i32> %a)
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@ -123,7 +123,7 @@ define <16 x i16> @var_bitreverse_v16i16(<16 x i16> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_bitreverse_v16i16':
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; SSE2: Found an estimated cost of 54 for instruction: %bitreverse
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; SSE42: Found an estimated cost of 10 for instruction: %bitreverse
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; AVX: Found an estimated cost of 10 for instruction: %bitreverse
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; AVX: Found an estimated cost of 12 for instruction: %bitreverse
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; AVX2: Found an estimated cost of 5 for instruction: %bitreverse
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; XOP: Found an estimated cost of 4 for instruction: %bitreverse
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%bitreverse = call <16 x i16> @llvm.bitreverse.v16i16(<16 x i16> %a)
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@ -145,7 +145,7 @@ define <32 x i8> @var_bitreverse_v32i8(<32 x i8> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_bitreverse_v32i8':
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; SSE2: Found an estimated cost of 40 for instruction: %bitreverse
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; SSE42: Found an estimated cost of 10 for instruction: %bitreverse
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; AVX: Found an estimated cost of 10 for instruction: %bitreverse
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; AVX: Found an estimated cost of 12 for instruction: %bitreverse
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; AVX2: Found an estimated cost of 5 for instruction: %bitreverse
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; XOP: Found an estimated cost of 4 for instruction: %bitreverse
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%bitreverse = call <32 x i8> @llvm.bitreverse.v32i8(<32 x i8> %a)
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@ -69,7 +69,7 @@ define <4 x i64> @var_ctpop_v4i64(<4 x i64> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_ctpop_v4i64':
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; SSE2: Found an estimated cost of 24 for instruction: %ctpop
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; SSE42: Found an estimated cost of 14 for instruction: %ctpop
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; AVX1: Found an estimated cost of 14 for instruction: %ctpop
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; AVX1: Found an estimated cost of 16 for instruction: %ctpop
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; AVX2: Found an estimated cost of 7 for instruction: %ctpop
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%ctpop = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> %a)
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ret <4 x i64> %ctpop
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@ -88,7 +88,7 @@ define <8 x i32> @var_ctpop_v8i32(<8 x i32> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_ctpop_v8i32':
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; SSE2: Found an estimated cost of 30 for instruction: %ctpop
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; SSE42: Found an estimated cost of 22 for instruction: %ctpop
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; AVX1: Found an estimated cost of 22 for instruction: %ctpop
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; AVX1: Found an estimated cost of 24 for instruction: %ctpop
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; AVX2: Found an estimated cost of 11 for instruction: %ctpop
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%ctpop = call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> %a)
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ret <8 x i32> %ctpop
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@ -107,7 +107,7 @@ define <16 x i16> @var_ctpop_v16i16(<16 x i16> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_ctpop_v16i16':
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; SSE2: Found an estimated cost of 26 for instruction: %ctpop
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; SSE42: Found an estimated cost of 18 for instruction: %ctpop
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; AVX1: Found an estimated cost of 18 for instruction: %ctpop
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; AVX1: Found an estimated cost of 20 for instruction: %ctpop
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; AVX2: Found an estimated cost of 9 for instruction: %ctpop
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%ctpop = call <16 x i16> @llvm.ctpop.v16i16(<16 x i16> %a)
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ret <16 x i16> %ctpop
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@ -126,7 +126,7 @@ define <32 x i8> @var_ctpop_v32i8(<32 x i8> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_ctpop_v32i8':
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; SSE2: Found an estimated cost of 20 for instruction: %ctpop
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; SSE42: Found an estimated cost of 12 for instruction: %ctpop
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; AVX1: Found an estimated cost of 12 for instruction: %ctpop
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; AVX1: Found an estimated cost of 14 for instruction: %ctpop
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; AVX2: Found an estimated cost of 6 for instruction: %ctpop
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%ctpop = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %a)
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ret <32 x i8> %ctpop
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@ -229,7 +229,7 @@ define <4 x i64> @var_ctlz_v4i64(<4 x i64> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v4i64':
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; SSE2: Found an estimated cost of 50 for instruction: %ctlz
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; SSE42: Found an estimated cost of 46 for instruction: %ctlz
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; AVX1: Found an estimated cost of 46 for instruction: %ctlz
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; AVX1: Found an estimated cost of 48 for instruction: %ctlz
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; AVX2: Found an estimated cost of 23 for instruction: %ctlz
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%ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 0)
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ret <4 x i64> %ctlz
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@ -239,7 +239,7 @@ define <4 x i64> @var_ctlz_v4i64u(<4 x i64> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v4i64u':
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; SSE2: Found an estimated cost of 50 for instruction: %ctlz
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; SSE42: Found an estimated cost of 46 for instruction: %ctlz
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; AVX1: Found an estimated cost of 46 for instruction: %ctlz
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; AVX1: Found an estimated cost of 48 for instruction: %ctlz
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; AVX2: Found an estimated cost of 23 for instruction: %ctlz
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%ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 1)
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ret <4 x i64> %ctlz
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@ -267,7 +267,7 @@ define <8 x i32> @var_ctlz_v8i32(<8 x i32> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v8i32':
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; SSE2: Found an estimated cost of 52 for instruction: %ctlz
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; SSE42: Found an estimated cost of 36 for instruction: %ctlz
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; AVX1: Found an estimated cost of 36 for instruction: %ctlz
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; AVX1: Found an estimated cost of 38 for instruction: %ctlz
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; AVX2: Found an estimated cost of 18 for instruction: %ctlz
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%ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 0)
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ret <8 x i32> %ctlz
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@ -277,7 +277,7 @@ define <8 x i32> @var_ctlz_v8i32u(<8 x i32> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v8i32u':
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; SSE2: Found an estimated cost of 52 for instruction: %ctlz
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; SSE42: Found an estimated cost of 36 for instruction: %ctlz
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; AVX1: Found an estimated cost of 36 for instruction: %ctlz
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; AVX1: Found an estimated cost of 38 for instruction: %ctlz
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; AVX2: Found an estimated cost of 18 for instruction: %ctlz
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%ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 1)
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ret <8 x i32> %ctlz
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@ -305,7 +305,7 @@ define <16 x i16> @var_ctlz_v16i16(<16 x i16> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v16i16':
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; SSE2: Found an estimated cost of 40 for instruction: %ctlz
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; SSE42: Found an estimated cost of 28 for instruction: %ctlz
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; AVX1: Found an estimated cost of 28 for instruction: %ctlz
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; AVX1: Found an estimated cost of 30 for instruction: %ctlz
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; AVX2: Found an estimated cost of 14 for instruction: %ctlz
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%ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 0)
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ret <16 x i16> %ctlz
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@ -315,7 +315,7 @@ define <16 x i16> @var_ctlz_v16i16u(<16 x i16> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v16i16u':
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; SSE2: Found an estimated cost of 40 for instruction: %ctlz
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; SSE42: Found an estimated cost of 28 for instruction: %ctlz
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; AVX1: Found an estimated cost of 28 for instruction: %ctlz
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; AVX1: Found an estimated cost of 30 for instruction: %ctlz
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; AVX2: Found an estimated cost of 14 for instruction: %ctlz
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%ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 1)
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ret <16 x i16> %ctlz
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@ -343,7 +343,7 @@ define <32 x i8> @var_ctlz_v32i8(<32 x i8> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v32i8':
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; SSE2: Found an estimated cost of 34 for instruction: %ctlz
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; SSE42: Found an estimated cost of 18 for instruction: %ctlz
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; AVX1: Found an estimated cost of 18 for instruction: %ctlz
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; AVX1: Found an estimated cost of 20 for instruction: %ctlz
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; AVX2: Found an estimated cost of 9 for instruction: %ctlz
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%ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 0)
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ret <32 x i8> %ctlz
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@ -353,7 +353,7 @@ define <32 x i8> @var_ctlz_v32i8u(<32 x i8> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v32i8u':
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; SSE2: Found an estimated cost of 34 for instruction: %ctlz
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; SSE42: Found an estimated cost of 18 for instruction: %ctlz
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; AVX1: Found an estimated cost of 18 for instruction: %ctlz
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; AVX1: Found an estimated cost of 20 for instruction: %ctlz
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; AVX2: Found an estimated cost of 9 for instruction: %ctlz
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%ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 1)
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ret <32 x i8> %ctlz
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@ -456,7 +456,7 @@ define <4 x i64> @var_cttz_v4i64(<4 x i64> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_cttz_v4i64':
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; SSE2: Found an estimated cost of 28 for instruction: %cttz
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; SSE42: Found an estimated cost of 20 for instruction: %cttz
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; AVX1: Found an estimated cost of 20 for instruction: %cttz
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; AVX1: Found an estimated cost of 22 for instruction: %cttz
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; AVX2: Found an estimated cost of 10 for instruction: %cttz
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%cttz = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> %a, i1 0)
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ret <4 x i64> %cttz
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@ -466,7 +466,7 @@ define <4 x i64> @var_cttz_v4i64u(<4 x i64> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_cttz_v4i64u':
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; SSE2: Found an estimated cost of 28 for instruction: %cttz
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; SSE42: Found an estimated cost of 20 for instruction: %cttz
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; AVX1: Found an estimated cost of 20 for instruction: %cttz
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; AVX1: Found an estimated cost of 22 for instruction: %cttz
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; AVX2: Found an estimated cost of 10 for instruction: %cttz
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%cttz = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> %a, i1 1)
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ret <4 x i64> %cttz
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@ -494,7 +494,7 @@ define <8 x i32> @var_cttz_v8i32(<8 x i32> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_cttz_v8i32':
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; SSE2: Found an estimated cost of 36 for instruction: %cttz
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; SSE42: Found an estimated cost of 28 for instruction: %cttz
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; AVX1: Found an estimated cost of 28 for instruction: %cttz
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; AVX1: Found an estimated cost of 30 for instruction: %cttz
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; AVX2: Found an estimated cost of 14 for instruction: %cttz
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%cttz = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> %a, i1 0)
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ret <8 x i32> %cttz
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@ -504,7 +504,7 @@ define <8 x i32> @var_cttz_v8i32u(<8 x i32> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_cttz_v8i32u':
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; SSE2: Found an estimated cost of 36 for instruction: %cttz
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; SSE42: Found an estimated cost of 28 for instruction: %cttz
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; AVX1: Found an estimated cost of 28 for instruction: %cttz
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; AVX1: Found an estimated cost of 30 for instruction: %cttz
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; AVX2: Found an estimated cost of 14 for instruction: %cttz
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%cttz = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> %a, i1 1)
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ret <8 x i32> %cttz
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@ -532,7 +532,7 @@ define <16 x i16> @var_cttz_v16i16(<16 x i16> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_cttz_v16i16':
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; SSE2: Found an estimated cost of 32 for instruction: %cttz
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; SSE42: Found an estimated cost of 24 for instruction: %cttz
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; AVX1: Found an estimated cost of 24 for instruction: %cttz
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; AVX1: Found an estimated cost of 26 for instruction: %cttz
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; AVX2: Found an estimated cost of 12 for instruction: %cttz
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%cttz = call <16 x i16> @llvm.cttz.v16i16(<16 x i16> %a, i1 0)
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ret <16 x i16> %cttz
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@ -542,7 +542,7 @@ define <16 x i16> @var_cttz_v16i16u(<16 x i16> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_cttz_v16i16u':
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; SSE2: Found an estimated cost of 32 for instruction: %cttz
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; SSE42: Found an estimated cost of 24 for instruction: %cttz
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; AVX1: Found an estimated cost of 24 for instruction: %cttz
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; AVX1: Found an estimated cost of 26 for instruction: %cttz
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; AVX2: Found an estimated cost of 12 for instruction: %cttz
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%cttz = call <16 x i16> @llvm.cttz.v16i16(<16 x i16> %a, i1 1)
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ret <16 x i16> %cttz
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@ -570,7 +570,7 @@ define <32 x i8> @var_cttz_v32i8(<32 x i8> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_cttz_v32i8':
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; SSE2: Found an estimated cost of 26 for instruction: %cttz
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; SSE42: Found an estimated cost of 18 for instruction: %cttz
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; AVX1: Found an estimated cost of 18 for instruction: %cttz
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; AVX1: Found an estimated cost of 20 for instruction: %cttz
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; AVX2: Found an estimated cost of 9 for instruction: %cttz
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%cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 0)
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ret <32 x i8> %cttz
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@ -580,7 +580,7 @@ define <32 x i8> @var_cttz_v32i8u(<32 x i8> %a) {
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; CHECK: 'Cost Model Analysis' for function 'var_cttz_v32i8u':
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; SSE2: Found an estimated cost of 26 for instruction: %cttz
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; SSE42: Found an estimated cost of 18 for instruction: %cttz
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; AVX1: Found an estimated cost of 18 for instruction: %cttz
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; AVX1: Found an estimated cost of 20 for instruction: %cttz
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; AVX2: Found an estimated cost of 9 for instruction: %cttz
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%cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 1)
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ret <32 x i8> %cttz
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