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- Each val# can have multiple kills.
- Fix some minor bugs related to special markers on val# def. ~0U means undefined, ~1U means dead val#. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40916 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -87,17 +87,14 @@ namespace llvm {
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Ranges ranges; // the ranges in which this register is live
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/// ValueNumberInfo - If the value number definition is undefined (e.g. phi
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/// merge point), it contains ~0,x,x. If the value number is not in use, it
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/// contains ~1,x,x to indicate that the value # is not used. The first
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/// entry is the instruction # of the definition, the second is the kill #.
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/// If the third value is non-zero, then the val# is defined by a copy and
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/// it represents the register number it is copied from.
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/// merge point), it contains ~0u,x. If the value number is not in use, it
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/// contains ~1u,x to indicate that the value # is not used.
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struct VNInfo {
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unsigned def;
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unsigned kill;
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unsigned reg;
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VNInfo() : def(~1U), kill(~0U), reg(0) {};
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VNInfo(unsigned d, unsigned k, unsigned r) : def(d), kill(k), reg(r) {};
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unsigned def; // instruction # of the definition
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unsigned reg; // src reg: non-zero iff val# is defined by a copy
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SmallVector<unsigned, 4> kills; // instruction #s of the kills
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VNInfo() : def(~1U), reg(0) {};
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VNInfo(unsigned d, unsigned r) : def(d), reg(r) {};
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};
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private:
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SmallVector<VNInfo, 4> ValueNumberInfo;
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@ -143,7 +140,7 @@ namespace llvm {
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/// getNextValue - Create a new value number and return it. MIIdx specifies
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/// the instruction that defines the value number.
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unsigned getNextValue(unsigned MIIdx, unsigned SrcReg) {
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ValueNumberInfo.push_back(VNInfo(MIIdx, ~0U, SrcReg));
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ValueNumberInfo.push_back(VNInfo(MIIdx, SrcReg));
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return ValueNumberInfo.size()-1;
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}
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@ -154,18 +151,24 @@ namespace llvm {
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return ValueNumberInfo[ValNo].def;
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}
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/// getKillForValNum - Return the machine instruction index that kills the
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/// specified value number.
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unsigned getKillForValNum(unsigned ValNo) const {
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//assert(ValNo < ValueNumberInfo.size());
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return ValueNumberInfo[ValNo].kill;
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}
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unsigned getSrcRegForValNum(unsigned ValNo) const {
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//assert(ValNo < ValueNumberInfo.size());
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return ValueNumberInfo[ValNo].reg;
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}
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/// getKillsForValNum - Return the kill instruction indexes of the specified
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/// value number.
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SmallVector<unsigned, 4> getKillsForValNum(unsigned ValNo) const {
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//assert(ValNo < ValueNumberInfo.size());
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return ValueNumberInfo[ValNo].kills;
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}
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/// addKillForValNum - Add a kill instruction index to the specified value
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/// number.
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void addKillForValNum(unsigned ValNo, unsigned KillIdx) {
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ValueNumberInfo[ValNo].kills.push_back(KillIdx);
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}
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VNInfo getValNumInfo(unsigned ValNo) const {
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//assert(ValNo < ValueNumberInfo.size());
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return ValueNumberInfo[ValNo];
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@ -300,7 +300,7 @@ void LiveInterval::join(LiveInterval &Other, int *LHSValNoAssignments,
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// we want to avoid the interval scan if not.
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bool MustMapCurValNos = false;
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for (unsigned i = 0, e = getNumValNums(); i != e; ++i) {
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if (ValueNumberInfo[i].def == ~1U) continue; // tombstone value #
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//if (ValueNumberInfo[i].def == ~1U) continue; // tombstone value #
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if (i != (unsigned)LHSValNoAssignments[i]) {
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MustMapCurValNos = true;
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break;
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@ -508,14 +508,11 @@ void LiveInterval::print(std::ostream &OS, const MRegisterInfo *MRI) const {
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OS << i << "@";
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if (ValueNumberInfo[i].def == ~0U) {
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OS << "?";
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} else if (ValueNumberInfo[i].def == ~1U) {
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OS << "x";
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} else {
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OS << ValueNumberInfo[i].def;
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}
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if (ValueNumberInfo[i].kill == ~0U) {
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OS << ",?";
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} else {
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OS << "," << ValueNumberInfo[i].kill;
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}
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}
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}
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}
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@ -347,7 +347,6 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// Get the Idx of the defining instructions.
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unsigned defIndex = getDefIndex(MIIdx);
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unsigned ValNum;
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unsigned SrcReg, DstReg;
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if (!tii_->isMoveInstr(*mi, SrcReg, DstReg))
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@ -378,6 +377,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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LiveRange LR(defIndex, killIdx, ValNum);
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interval.addRange(LR);
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DOUT << " +" << LR << "\n";
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interval.addKillForValNum(ValNum, killIdx);
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return;
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}
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}
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@ -412,10 +412,11 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// block to the 'use' slot of the killing instruction.
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for (unsigned i = 0, e = vi.Kills.size(); i != e; ++i) {
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MachineInstr *Kill = vi.Kills[i];
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unsigned killIdx = getUseIndex(getInstructionIndex(Kill))+1;
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LiveRange LR(getMBBStartIdx(Kill->getParent()),
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getUseIndex(getInstructionIndex(Kill))+1,
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ValNum);
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killIdx, ValNum);
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interval.addRange(LR);
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interval.addKillForValNum(ValNum, killIdx);
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DOUT << " +" << LR;
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}
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@ -450,7 +451,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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interval.setValueNumberInfo(1, interval.getValNumInfo(0));
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// Value#0 is now defined by the 2-addr instruction.
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interval.setValueNumberInfo(0, LiveInterval::VNInfo(DefIndex, ~0U, 0U));
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interval.setValueNumberInfo(0, LiveInterval::VNInfo(DefIndex, 0U));
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// Add the new live interval which replaces the range for the input copy.
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LiveRange LR(DefIndex, RedefIndex, ValNo);
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@ -132,7 +132,7 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA, LiveInte
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// We are about to delete CopyMI, so need to remove it as the 'instruction
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// that defines this value #'. Update the the valnum with the new defining
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// instruction #.
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IntB.setValueNumberInfo(BValNo, LiveInterval::VNInfo(FillerStart, ~0U, 0));
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IntB.setValueNumberInfo(BValNo, LiveInterval::VNInfo(FillerStart, 0));
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// Okay, we can merge them. We need to insert a new liverange:
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// [ValLR.end, BLR.begin) of either value number, then we merge the
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@ -645,7 +645,7 @@ bool SimpleRegisterCoalescing::JoinIntervals(LiveInterval &LHS, LiveInterval &RH
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// Otherwise, use the specified value #.
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LHSValNoAssignments[VN] = RHSValID;
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if (VN != (unsigned)RHSValID)
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ValueNumberInfo[VN].def = ~1U;
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ValueNumberInfo[VN].def = RHSValNoInfo.def;
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else
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ValueNumberInfo[VN] = RHSValNoInfo;
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}
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