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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25956 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jeff Cohen 2006-02-04 03:27:04 +00:00
parent dc19b70d24
commit 8e3be85c1e
1 changed files with 4 additions and 5 deletions
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9
win32/x86/x86.vcproj
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@ -124,7 +124,8 @@
..\$(IntDir)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter.inc ..\$(IntDir)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter.inc
..\$(IntDir)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter1.inc ..\$(IntDir)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter1.inc
..\$(IntDir)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target\X86 $(InputPath) -o X86GenDAGISel.inc ..\$(IntDir)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target\X86 $(InputPath) -o X86GenDAGISel.inc
..\$(IntDir)\TableGen.exe -gen-subtarget -I ..\..\lib\Target\X86 $(InputPath) -o X86GenSubtarget.inc" ..\$(IntDir)\TableGen.exe -gen-subtarget -I ..\..\lib\Target\X86 $(InputPath) -o X86GenSubtarget.inc
"
AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)..\Target.td;$(ProjectDir)..\$(IntDir)\TableGen.exe" AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)..\Target.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc"/> Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc"/>
</FileConfiguration> </FileConfiguration>
@ -141,7 +142,8 @@
..\$(IntDir)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter.inc ..\$(IntDir)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter.inc
..\$(IntDir)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter1.inc ..\$(IntDir)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter1.inc
..\$(IntDir)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target\X86 $(InputPath) -o X86GenDAGISel.inc ..\$(IntDir)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target\X86 $(InputPath) -o X86GenDAGISel.inc
..\$(IntDir)\TableGen.exe -gen-subtarget -I ..\..\lib\Target\X86 $(InputPath) -o X86GenSubtarget.inc" ..\$(IntDir)\TableGen.exe -gen-subtarget -I ..\..\lib\Target\X86 $(InputPath) -o X86GenSubtarget.inc
"
AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)..\Target.td;$(ProjectDir)..\$(IntDir)\TableGen.exe" AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)..\Target.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc"/> Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc"/>
</FileConfiguration> </FileConfiguration>
@ -179,9 +181,6 @@
<File <File
RelativePath="..\..\lib\Target\X86\X86JITInfo.cpp"> RelativePath="..\..\lib\Target\X86\X86JITInfo.cpp">
</File> </File>
<File
RelativePath="..\..\lib\Target\X86\X86PeepholeOpt.cpp">
</File>
<File <File
RelativePath="..\..\lib\Target\X86\X86RegisterInfo.cpp"> RelativePath="..\..\lib\Target\X86\X86RegisterInfo.cpp">
</File> </File>