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[X86][AVX] Regenerated vselect tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261026 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim
parent
9867695c88
commit
900da0f340
@ -1,23 +1,29 @@
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; RUN: llc %s -o - -mattr=+avx | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+avx | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx"
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; For this test we used to optimize the <i1 true, i1 false, i1 false, i1 true>
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; mask into <i32 2147483648, i32 0, i32 0, i32 2147483648> because we thought
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; we would lower that into a blend where only the high bit is relevant.
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; However, since the whole mask is constant, this is simplified incorrectly
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; by the generic code, because it was expecting -1 in place of 2147483648.
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;
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;
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; The problem does not occur without AVX, because vselect of v4i32 is not legal
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; nor custom.
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;
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; <rdar://problem/18675020>
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; CHECK-LABEL: test:
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; CHECK: vmovdqa {{.*#+}} xmm1 = [65533,124,125,14807]
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; CHECK: vmovdqa {{.*#+}} xmm1 = [65535,0,0,65535]
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; CHECK: ret
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define void @test(<4 x i16>* %a, <4 x i16>* %b) {
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; CHECK-LABEL: test:
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; CHECK: ## BB#0: ## %body
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm0 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm1 = [65533,124,125,14807]
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; CHECK-NEXT: vpshufb %xmm0, %xmm1, %xmm1
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; CHECK-NEXT: vmovq %xmm1, (%rdi)
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm1 = [65535,0,0,65535]
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; CHECK-NEXT: vpshufb %xmm0, %xmm1, %xmm0
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; CHECK-NEXT: vmovq %xmm0, (%rsi)
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; CHECK-NEXT: retq
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body:
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%predphi = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i16> <i16 -3, i16 545, i16 4385, i16 14807>, <4 x i16> <i16 123, i16 124, i16 125, i16 127>
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%predphi42 = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> zeroinitializer
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@ -31,17 +37,22 @@ body:
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; When shrinking the condition used into the select to match a blend, this
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; test case exercises the path where the modified node is not the root
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; of the condition.
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;
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; CHECK-LABEL: test2:
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; CHECK: vpslld $31, %xmm0, %xmm0
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; CHECK-NEXT: vpsrad $31, %xmm0, %xmm0
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; CHECK-NEXT: vpmovsxdq %xmm0, %xmm1
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; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; CHECK-NEXT: vpmovsxdq %xmm0, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm1, [[MASK:%ymm[0-9]+]]
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; CHECK: vblendvpd [[MASK]]
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; CHECK: retq
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define void @test2(double** %call1559, i64 %indvars.iv4198, <4 x i1> %tmp1895) {
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; CHECK-LABEL: test2:
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; CHECK: ## BB#0: ## %bb
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; CHECK-NEXT: vpslld $31, %xmm0, %xmm0
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; CHECK-NEXT: vpsrad $31, %xmm0, %xmm0
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; CHECK-NEXT: vpmovsxdq %xmm0, %xmm1
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; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; CHECK-NEXT: vpmovsxdq %xmm0, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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; CHECK-NEXT: movq (%rdi,%rsi,8), %rax
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; CHECK-NEXT: vmovapd {{.*#+}} ymm1 = [5.000000e-01,5.000000e-01,5.000000e-01,5.000000e-01]
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; CHECK-NEXT: vblendvpd %ymm0, {{.*}}(%rip), %ymm1, %ymm0
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; CHECK-NEXT: vmovupd %ymm0, (%rax)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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bb:
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%arrayidx1928 = getelementptr inbounds double*, double** %call1559, i64 %indvars.iv4198
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%tmp1888 = load double*, double** %arrayidx1928, align 8
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@ -57,22 +68,32 @@ bb:
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; to be optimized into a and. In that case, the conditional mask was wrong.
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;
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; Make sure that the and is fed by the original mask.
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;
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;
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; <rdar://problem/18819506>
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; CHECK-LABEL: test3:
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; Compute the mask.
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; CHECK: vpcmpeqd {{%xmm[0-9]+}}, {{%xmm[0-9]+}}, [[MASK:%xmm[0-9]+]]
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; Do not shrink the bit of the mask.
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; CHECK-NOT: vpslld $31, [[MASK]], {{%xmm[0-9]+}}
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; Use the mask in the blend.
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; CHECK-NEXT: vblendvps [[MASK]], %xmm{{[0-9]+}}, %xmm{{[0-9]+}}, %xmm{{[0-9]+}}
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; Shuffle mask to truncate.
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; CHECK: vpshufb %xmm{{[0-9]+}}, %xmm{{[0-9]+}}, %xmm{{[0-9]+}}
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; CHECK: vpshufb %xmm{{[0-9]+}}, %xmm{{[0-9]+}}, %xmm{{[0-9]+}}
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; CHECK: retq
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define void @test3(<4 x i32> %induction30, <4 x i16>* %tmp16, <4 x i16>* %tmp17, <4 x i16> %tmp3, <4 x i16> %tmp12) {
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; CHECK-LABEL: test3:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm3 = [1431655766,1431655766,1431655766,1431655766]
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; CHECK-NEXT: vpshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
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; CHECK-NEXT: vpshufd {{.*#+}} xmm5 = xmm0[1,1,3,3]
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; CHECK-NEXT: vpmuldq %xmm4, %xmm5, %xmm4
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; CHECK-NEXT: vpmuldq %xmm3, %xmm0, %xmm3
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; CHECK-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
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; CHECK-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm4[2,3],xmm3[4,5],xmm4[6,7]
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; CHECK-NEXT: vpsrld $31, %xmm3, %xmm4
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; CHECK-NEXT: vpaddd %xmm4, %xmm3, %xmm3
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; CHECK-NEXT: vpmulld {{.*}}(%rip), %xmm3, %xmm3
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; CHECK-NEXT: vpsubd %xmm3, %xmm0, %xmm0
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; CHECK-NEXT: vpxor %xmm3, %xmm3, %xmm3
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; CHECK-NEXT: vpcmpeqd %xmm3, %xmm0, %xmm0
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; CHECK-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm1
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; CHECK-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; CHECK-NEXT: vmovq %xmm0, (%rdi)
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; CHECK-NEXT: vpshufb %xmm2, %xmm1, %xmm0
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; CHECK-NEXT: vmovq %xmm0, (%rsi)
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; CHECK-NEXT: retq
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%tmp6 = srem <4 x i32> %induction30, <i32 3, i32 3, i32 3, i32 3>
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%tmp7 = icmp eq <4 x i32> %tmp6, zeroinitializer
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%predphi = select <4 x i1> %tmp7, <4 x i16> %tmp3, <4 x i16> %tmp12
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@ -85,11 +106,24 @@ define void @test3(<4 x i32> %induction30, <4 x i16>* %tmp16, <4 x i16>* %tmp17,
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; We shouldn't try to lower this directly using VSELECT because we don't have
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; vpblendvb in AVX1, only in AVX2. Instead, it should be expanded.
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;
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; CHECK-LABEL: PR22706:
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; CHECK: vpcmpgtb
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; CHECK: vpcmpgtb
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define <32 x i8> @PR22706(<32 x i1> %x) {
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; CHECK-LABEL: PR22706:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
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; CHECK-NEXT: vpsllw $7, %xmm1, %xmm1
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]
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; CHECK-NEXT: vpand %xmm2, %xmm1, %xmm1
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; CHECK-NEXT: vpxor %xmm3, %xmm3, %xmm3
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; CHECK-NEXT: vpcmpgtb %xmm1, %xmm3, %xmm1
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; CHECK-NEXT: vpsllw $7, %xmm0, %xmm0
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; CHECK-NEXT: vpand %xmm2, %xmm0, %xmm0
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; CHECK-NEXT: vpcmpgtb %xmm0, %xmm3, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; CHECK-NEXT: vandnps {{.*}}(%rip), %ymm0, %ymm1
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; CHECK-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
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; CHECK-NEXT: vorps %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: retq
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%tmp = select <32 x i1> %x, <32 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>, <32 x i8> <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
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ret <32 x i8> %tmp
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}
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