RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-02-02 00:35:27 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[ARM] Better error message for invalid flag-preserving Thumb1 insts

Browse Source 
When we see a non flag-setting instruction for which only the flag-setting
version is available in Thumb1, we should give a better error message than
"invalid instruction".

Differential Revision: https://reviews.llvm.org/D27414



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288805 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Oliver Stannard 2016-12-06 12:59:08 +00:00
parent c700b40b54
commit 91bc1bbfb2
2 changed files with 5 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -523,6 +523,7 @@ public:
Match_RequiresV6,
Match_RequiresThumb2,
Match_RequiresV8,
Match_RequiresFlagSetting,
#define GET_OPERAND_DIAGNOSTIC_TYPES
#include "ARMGenAsmMatcher.inc"
@ -8905,7 +8906,7 @@ unsigned ARMAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
;
// If we're parsing Thumb1, reject it completely.
if (isThumbOne() && Inst.getOperand(OpNo).getReg() != ARM::CPSR)
return Match_MnemonicFail;
return Match_RequiresFlagSetting;
// If we're parsing Thumb2, which form is legal depends on whether we're
// in an IT block.
if (isThumbTwo() && Inst.getOperand(OpNo).getReg() != ARM::CPSR &&
@ -9171,6 +9172,8 @@ bool ARMAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
return Error(IDLoc, "instruction variant requires Thumb2");
case Match_RequiresV8:
return Error(IDLoc, "instruction variant requires ARMv8 or later");
case Match_RequiresFlagSetting:
return Error(IDLoc, "no flag-preserving variant of this instruction available");
case Match_ImmRange0_15: {
SMLoc ErrorLoc = ((ARMOperand &)*Operands[ErrorInfo]).getStartLoc();
if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;

2
test/MC/ARM/thumb-diagnostics.s
View File

@ -11,7 +11,7 @@
@ ADD instruction w/o 'S' suffix.
add r1, r2, r3
@ CHECK-ERRORS: error: invalid instruction
@ CHECK-ERRORS: error: no flag-preserving variant of this instruction available
@ CHECK-ERRORS: add r1, r2, r3
@ CHECK-ERRORS: ^