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Fix a copy+paste bug; pseudo-instructions shouldn't have
encoding information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50997 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2601,58 +2601,51 @@ def LXADD8 : I<0xC0, MRMSrcMem, (outs GR8:$dst), (ins i8mem:$ptr, GR8:$val),
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// Atomic exchange and and, or, xor
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let Constraints = "$val = $dst", Defs = [EFLAGS],
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usesCustomDAGSchedInserter = 1 in {
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def ATOMAND32 : I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
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def ATOMAND32 : I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
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"#ATOMAND32 PSUEDO!",
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[(set GR32:$dst, (atomic_load_and addr:$ptr, GR32:$val))]>,
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TB, LOCK;
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[(set GR32:$dst, (atomic_load_and addr:$ptr, GR32:$val))]>;
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}
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let Constraints = "$val = $dst", Defs = [EFLAGS],
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usesCustomDAGSchedInserter = 1 in {
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def ATOMOR32 : I<0xC1, MRMSrcMem, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
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def ATOMOR32 : I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
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"#ATOMOR32 PSUEDO!",
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[(set GR32:$dst, (atomic_load_or addr:$ptr, GR32:$val))]>,
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TB, LOCK;
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[(set GR32:$dst, (atomic_load_or addr:$ptr, GR32:$val))]>;
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}
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let Constraints = "$val = $dst", Defs = [EFLAGS],
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usesCustomDAGSchedInserter = 1 in {
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def ATOMXOR32 : I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
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def ATOMXOR32 : I<0, Pseudo,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
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"#ATOMXOR32 PSUEDO!",
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[(set GR32:$dst, (atomic_load_xor addr:$ptr, GR32:$val))]>,
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TB, LOCK;
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[(set GR32:$dst, (atomic_load_xor addr:$ptr, GR32:$val))]>;
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}
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let Constraints = "$val = $dst", Defs = [EFLAGS],
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usesCustomDAGSchedInserter = 1 in {
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def ATOMMIN32: I<0xC1, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$ptr, GR32:$val),
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def ATOMMIN32: I<0, Pseudo, (outs GR32:$dst), (ins i32mem:$ptr, GR32:$val),
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"#ATOMMIN32 PSUEDO!",
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[(set GR32:$dst, (atomic_load_min addr:$ptr, GR32:$val))]>,
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TB, LOCK;
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[(set GR32:$dst, (atomic_load_min addr:$ptr, GR32:$val))]>;
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}
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let Constraints = "$val = $dst", Defs = [EFLAGS],
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usesCustomDAGSchedInserter = 1 in {
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def ATOMMAX32: I<0xC1, MRMSrcMem, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
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def ATOMMAX32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
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"#ATOMMAX32 PSUEDO!",
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[(set GR32:$dst, (atomic_load_max addr:$ptr, GR32:$val))]>,
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TB, LOCK;
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[(set GR32:$dst, (atomic_load_max addr:$ptr, GR32:$val))]>;
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}
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let Constraints = "$val = $dst", Defs = [EFLAGS],
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usesCustomDAGSchedInserter = 1 in {
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def ATOMUMIN32: I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
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def ATOMUMIN32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
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"#ATOMUMIN32 PSUEDO!",
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[(set GR32:$dst, (atomic_load_umin addr:$ptr, GR32:$val))]>,
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TB, LOCK;
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[(set GR32:$dst, (atomic_load_umin addr:$ptr, GR32:$val))]>;
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}
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let Constraints = "$val = $dst", Defs = [EFLAGS],
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usesCustomDAGSchedInserter = 1 in {
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def ATOMUMAX32: I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
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def ATOMUMAX32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
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"#ATOMUMAX32 PSUEDO!",
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[(set GR32:$dst, (atomic_load_umax addr:$ptr, GR32:$val))]>,
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TB, LOCK;
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[(set GR32:$dst, (atomic_load_umax addr:$ptr, GR32:$val))]>;
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}
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//===----------------------------------------------------------------------===//
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