mirror of
https://github.com/RPCS3/llvm.git
synced 2024-11-29 22:50:55 +00:00
Added a custom TableGen backend to support the
enhanced disassembler, and the necessary makefile rules to build the table for X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94764 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sean Callanan
parent
1897ed3d37
commit
95fcebd5c4
@ -1574,6 +1574,11 @@ $(ObjDir)/%GenDisassemblerTables.inc.tmp : %.td $(ObjDir)/.dir
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$(Echo) "Building $(<F) disassembly tables with tblgen"
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$(Verb) $(TableGen) -gen-disassembler -o $(call SYSPATH, $@) $<
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$(TARGET:%=$(ObjDir)/%GenEDInfo.inc.tmp): \
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$(ObjDir)/%GenEDInfo.inc.tmp : %.td $(ObjDir)/.dir
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$(Echo) "Building $(<F) enhanced disassembly information with tblgen"
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$(Verb) $(TableGen) -gen-enhanced-disassembly-info -o $(call SYSPATH, $@) $<
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$(TARGET:%=$(ObjDir)/%GenFastISel.inc.tmp): \
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$(ObjDir)/%GenFastISel.inc.tmp : %.td $(ObjDir)/.dir
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$(Echo) "Building $(<F) \"fast\" instruction selector implementation with tblgen"
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@ -18,6 +18,7 @@ BUILT_SOURCES = X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
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X86GenAsmWriter1.inc X86GenDAGISel.inc \
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X86GenDisassemblerTables.inc X86GenFastISel.inc \
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X86GenCallingConv.inc X86GenSubtarget.inc \
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X86GenEDInfo.inc
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DIRS = AsmPrinter AsmParser Disassembler TargetInfo
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856
utils/TableGen/EDEmitter.cpp
Normal file
856
utils/TableGen/EDEmitter.cpp
Normal file
@ -0,0 +1,856 @@
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//===- EDEmitter.cpp - Generate instruction descriptions for ED -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This tablegen backend is responsible for emitting a description of each
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// instruction in a format that the enhanced disassembler can use to tokenize
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// and parse instructions.
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//
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//===----------------------------------------------------------------------===//
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#include "EDEmitter.h"
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#include "CodeGenTarget.h"
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#include "Record.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/Format.h"
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#include "llvm/Support/raw_ostream.h"
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#include <vector>
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#include <string>
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#define MAX_OPERANDS 5
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#define MAX_SYNTAXES 2
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using namespace llvm;
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///////////////////////////////////////////////////////////
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// Support classes for emitting nested C data structures //
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///////////////////////////////////////////////////////////
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namespace {
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class EnumEmitter {
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private:
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std::string Name;
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std::vector<std::string> Entries;
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public:
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EnumEmitter(const char *N) : Name(N) {
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}
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int addEntry(const char *e) {
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Entries.push_back(std::string(e));
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return Entries.size() - 1;
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}
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void emit(raw_ostream &o, unsigned int &i) {
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o.indent(i) << "enum " << Name.c_str() << " {" << "\n";
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i += 2;
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unsigned int index = 0;
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unsigned int numEntries = Entries.size();
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for(index = 0; index < numEntries; ++index) {
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o.indent(i) << Entries[index];
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if(index < (numEntries - 1))
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o << ",";
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o << "\n";
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}
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i -= 2;
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o.indent(i) << "};" << "\n";
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}
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void emitAsFlags(raw_ostream &o, unsigned int &i) {
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o.indent(i) << "enum " << Name.c_str() << " {" << "\n";
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i += 2;
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unsigned int index = 0;
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unsigned int numEntries = Entries.size();
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unsigned int flag = 1;
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for (index = 0; index < numEntries; ++index) {
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o.indent(i) << Entries[index] << " = " << format("0x%x", flag);
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if (index < (numEntries - 1))
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o << ",";
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o << "\n";
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flag <<= 1;
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}
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i -= 2;
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o.indent(i) << "};" << "\n";
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}
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};
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class StructEmitter {
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private:
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std::string Name;
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std::vector<std::string> MemberTypes;
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std::vector<std::string> MemberNames;
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public:
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StructEmitter(const char *N) : Name(N) {
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}
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void addMember(const char *t, const char *n) {
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MemberTypes.push_back(std::string(t));
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MemberNames.push_back(std::string(n));
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}
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void emit(raw_ostream &o, unsigned int &i) {
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o.indent(i) << "struct " << Name.c_str() << " {" << "\n";
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i += 2;
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unsigned int index = 0;
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unsigned int numMembers = MemberTypes.size();
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for (index = 0; index < numMembers; ++index) {
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o.indent(i) << MemberTypes[index] << " " << MemberNames[index] << ";";
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o << "\n";
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}
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i -= 2;
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o.indent(i) << "};" << "\n";
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}
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};
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class ConstantEmitter {
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public:
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virtual ~ConstantEmitter() { }
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virtual void emit(raw_ostream &o, unsigned int &i) = 0;
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};
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class LiteralConstantEmitter : public ConstantEmitter {
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private:
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std::string Literal;
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public:
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LiteralConstantEmitter(const char *literal) : Literal(literal) {
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}
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LiteralConstantEmitter(int literal) {
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char buf[256];
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snprintf(buf, 256, "%d", literal);
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Literal = buf;
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}
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void emit(raw_ostream &o, unsigned int &i) {
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o << Literal;
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}
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};
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class CompoundConstantEmitter : public ConstantEmitter {
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private:
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std::vector<ConstantEmitter*> Entries;
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public:
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CompoundConstantEmitter() {
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}
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~CompoundConstantEmitter() {
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unsigned int index;
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unsigned int numEntries = Entries.size();
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for (index = 0; index < numEntries; ++index) {
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delete Entries[index];
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}
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}
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CompoundConstantEmitter &addEntry(ConstantEmitter *e) {
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Entries.push_back(e);
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return *this;
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}
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void emit(raw_ostream &o, unsigned int &i) {
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o << "{" << "\n";
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i += 2;
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unsigned int index;
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unsigned int numEntries = Entries.size();
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for (index = 0; index < numEntries; ++index) {
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o.indent(i);
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Entries[index]->emit(o, i);
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if (index < (numEntries - 1))
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o << ",";
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o << "\n";
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}
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i -= 2;
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o.indent(i) << "}";
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}
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};
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class FlagsConstantEmitter : public ConstantEmitter {
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private:
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std::vector<std::string> Flags;
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public:
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FlagsConstantEmitter() {
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}
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FlagsConstantEmitter &addEntry(const char *f) {
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Flags.push_back(std::string(f));
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return *this;
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}
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void emit(raw_ostream &o, unsigned int &i) {
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unsigned int index;
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unsigned int numFlags = Flags.size();
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if (numFlags == 0)
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o << "0";
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for (index = 0; index < numFlags; ++index) {
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o << Flags[index].c_str();
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if (index < (numFlags - 1))
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o << " | ";
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}
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}
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};
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}
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EDEmitter::EDEmitter(RecordKeeper &R) : Records(R) {
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}
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//////////////////////////////////////////////
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// Support functions for parsing AsmStrings //
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//////////////////////////////////////////////
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/// parseError - A better error reporter for use in AsmString parsers
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///
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/// @arg asmString - The original assembly string, for use in the error report
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/// @arg index - The character where the error occurred
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/// @arg err - The text of the error itself
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static void parseError(const std::string& asmString,
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unsigned int index,
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const char* err) {
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errs() << "In: " << asmString.c_str() << "\n";
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errs() << "Error at " << format("%d", index) << ": " << err << "\n";
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llvm_unreachable("Parse error");
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}
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/// resolveBraces - Interprets the brace syntax in an AsmString in favor of just
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/// one syntax, and returns the result. "{A}" is resolved to "A" for syntax 0
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/// and "" for all others; "{A|B}" is resolved to "A" for syntax 0, "B" for
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/// syntax 1, and "" for all others; and so on.
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///
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/// @arg asmString - The original string, as loaded from the .td file
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/// @arg syntaxIndex - The index to use
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static std::string resolveBraces(const std::string &asmString,
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unsigned int syntaxIndex) {
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std::string ret;
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unsigned int index;
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unsigned int numChars = asmString.length();
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// Brace parsing countable-state transducer
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//
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// STATES - -1, 0, 1, ..., error
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// SYMBOLS - '{', '|', '}', ?, EOF
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// START STATE - -1
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//
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// state input -> state output
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// -1 '{' -> 0
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// -1 '|' -> error
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// -1 '}' -> error
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// -1 ? -> -1 ?
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// -1 EOF -> -1
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// n '{' -> error
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// n '|' -> n+1
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// n '}' -> -1
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// n ? -> n ? if n == syntaxIndex
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// if not
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// n EOF -> error
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int state = -1;
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for (index = 0; index < numChars; ++index) {
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char input = asmString[index];
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switch (state) {
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default:
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switch (input) {
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default:
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if (state == (int)syntaxIndex)
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ret.push_back(input);
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break;
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case '{':
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parseError(asmString, index, "Nested { in AsmString");
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break;
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case '|':
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state++;
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break;
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case '}':
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state = -1;
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break;
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}
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break;
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case -1:
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switch (input) {
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default:
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ret.push_back(input);
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break;
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case '{':
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state = 0;
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break;
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case '|':
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parseError(asmString, index, "| outside braces in AsmString");
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break;
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case '}':
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parseError(asmString, index, "Unmatched } in AsmString");
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break;
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}
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break;
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}
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}
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if (state != -1)
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parseError(asmString, index, "Unmatched { in AsmString");
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return ret;
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}
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/// getOperandIndex - looks up a named operand in an instruction and determines
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/// its index in the operand descriptor array, returning the index or -1 if it
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/// is not present.
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///
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/// @arg asmString - The assembly string for the instruction, for errors only
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/// @arg operand - The operand's name
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/// @arg inst - The instruction to use when looking up the operand
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static int8_t getOperandIndex(const std::string &asmString,
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const std::string &operand,
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const CodeGenInstruction &inst) {
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int8_t operandIndex;
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if(operand.length() == 0) {
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errs() << "In: " << asmString << "\n";
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errs() << "Operand: " << operand << "\n";
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llvm_unreachable("Empty operand");
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}
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try {
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operandIndex = inst.getOperandNamed(operand);
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}
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catch (...) {
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return -1;
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}
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return operandIndex;
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}
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/// isAlphanumeric - returns true if a character is a valid alphanumeric
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/// character, and false otherwise
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///
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/// input - The character to query
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static inline bool isAlphanumeric(char input) {
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if((input >= 'a' && input <= 'z') ||
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(input >= 'A' && input <= 'Z') ||
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(input >= '0' && input <= '9') ||
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(input == '_'))
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return true;
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else
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return false;
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}
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/// populateOperandOrder - reads a resolved AsmString (see resolveBraces) and
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/// records the index into the operand descriptor array for each operand in
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/// that string, in the order of appearance.
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///
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/// @arg operandOrder - The array that will be populated with the operand
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/// mapping. Each entry will contain -1 (invalid index
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/// into the operands present in the AsmString) or a number
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/// representing an index in the operand descriptor array.
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/// @arg asmString - The operand's name
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/// @arg inst - The instruction to use when looking up the operand
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void populateOperandOrder(CompoundConstantEmitter *operandOrder,
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const std::string &asmString,
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const CodeGenInstruction &inst) {
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std::string aux;
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unsigned int index;
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unsigned int numChars = asmString.length();
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unsigned int numArgs = 0;
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// Argument processing finite-state transducer
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//
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// STATES - 0, 1, error
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// SYMBOLS - A(lphanumeric), '$', ?, EOF
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// START STATE - 0
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//
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// state input -> state aux
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// 0 A -> 0
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// 0 '$' -> 1
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// 0 ? -> 0
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// 0 EOF -> 0
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// 1 A -> 1 A
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// 1 '$' -> error
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// 1 ? -> 0 clear
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// 1 EOF -> 0 clear
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unsigned int state = 0;
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for (index = 0; index < numChars; ++index) {
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char input = asmString[index];
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switch (state) {
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default:
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parseError(asmString, index, "Parser in unreachable state");
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case 0:
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if (input == '$') {
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state = 1;
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}
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break;
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case 1:
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if (isAlphanumeric(input)) {
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aux.push_back(input);
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}
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else if (input == '$') {
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parseError(asmString, index, "$ found in argument name");
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}
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else {
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int8_t operandIndex = getOperandIndex(asmString, aux, inst);
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char buf[3];
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snprintf(buf, sizeof(buf), "%d", operandIndex);
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operandOrder->addEntry(new LiteralConstantEmitter(buf));
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aux.clear();
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state = 0;
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numArgs++;
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}
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||||
break;
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||||
}
|
||||
}
|
||||
|
||||
if (state == 1) {
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int8_t operandIndex = getOperandIndex(asmString, aux, inst);
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char buf[2];
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snprintf(buf, 2, "%d", operandIndex);
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operandOrder->addEntry(new LiteralConstantEmitter(buf));
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aux.clear();
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numArgs++;
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||||
}
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for(; numArgs < MAX_OPERANDS; numArgs++) {
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operandOrder->addEntry(new LiteralConstantEmitter("-1"));
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}
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||||
}
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||||
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||||
/////////////////////////////////////////////////////
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||||
// Support functions for handling X86 instructions //
|
||||
/////////////////////////////////////////////////////
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||||
|
||||
#define ADDFLAG(flag) flags->addEntry(flag)
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||||
#define REG(str) if (name == str) { ADDFLAG("kOperandFlagRegister"); return 0; }
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||||
#define MEM(str) if (name == str) { ADDFLAG("kOperandFlagMemory"); return 0; }
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||||
#define LEA(str) if (name == str) { ADDFLAG("kOperandFlagEffectiveAddress"); \
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return 0; }
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#define IMM(str) if (name == str) { ADDFLAG("kOperandFlagImmediate"); \
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return 0; }
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#define PCR(str) if (name == str) { ADDFLAG("kOperandFlagMemory"); \
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ADDFLAG("kOperandFlagPCRelative"); \
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||||
return 0; }
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||||
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||||
/// X86FlagFromOpName - Processes the name of a single X86 operand (which is
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||||
/// actually its type) and translates it into an operand flag
|
||||
///
|
||||
/// @arg flags - The flags object to add the flag to
|
||||
/// @arg name - The name of the operand
|
||||
static int X86FlagFromOpName(FlagsConstantEmitter *flags,
|
||||
const std::string &name) {
|
||||
REG("GR8");
|
||||
REG("GR8_NOREX");
|
||||
REG("GR16");
|
||||
REG("GR32");
|
||||
REG("GR32_NOREX");
|
||||
REG("FR32");
|
||||
REG("RFP32");
|
||||
REG("GR64");
|
||||
REG("FR64");
|
||||
REG("VR64");
|
||||
REG("RFP64");
|
||||
REG("RFP80");
|
||||
REG("VR128");
|
||||
REG("RST");
|
||||
REG("SEGMENT_REG");
|
||||
REG("DEBUG_REG");
|
||||
REG("CONTROL_REG_32");
|
||||
REG("CONTROL_REG_64");
|
||||
|
||||
MEM("i8mem");
|
||||
MEM("i8mem_NOREX");
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||||
MEM("i16mem");
|
||||
MEM("i32mem");
|
||||
MEM("f32mem");
|
||||
MEM("ssmem");
|
||||
MEM("opaque32mem");
|
||||
MEM("opaque48mem");
|
||||
MEM("i64mem");
|
||||
MEM("f64mem");
|
||||
MEM("sdmem");
|
||||
MEM("f80mem");
|
||||
MEM("opaque80mem");
|
||||
MEM("i128mem");
|
||||
MEM("f128mem");
|
||||
MEM("opaque512mem");
|
||||
|
||||
LEA("lea32mem");
|
||||
LEA("lea64_32mem");
|
||||
LEA("lea64mem");
|
||||
|
||||
IMM("i8imm");
|
||||
IMM("i16imm");
|
||||
IMM("i16i8imm");
|
||||
IMM("i32imm");
|
||||
IMM("i32imm_pcrel");
|
||||
IMM("i32i8imm");
|
||||
IMM("i64imm");
|
||||
IMM("i64i8imm");
|
||||
IMM("i64i32imm");
|
||||
IMM("i64i32imm_pcrel");
|
||||
IMM("SSECC");
|
||||
|
||||
PCR("brtarget8");
|
||||
PCR("offset8");
|
||||
PCR("offset16");
|
||||
PCR("offset32");
|
||||
PCR("offset64");
|
||||
PCR("brtarget");
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#undef REG
|
||||
#undef MEM
|
||||
#undef LEA
|
||||
#undef IMM
|
||||
#undef PCR
|
||||
#undef ADDFLAG
|
||||
|
||||
/// X86PopulateOperands - Handles all the operands in an X86 instruction, adding
|
||||
/// the appropriate flags to their descriptors
|
||||
///
|
||||
/// @operandFlags - A reference the array of operand flag objects
|
||||
/// @inst - The instruction to use as a source of information
|
||||
static void X86PopulateOperands(
|
||||
FlagsConstantEmitter *(&operandFlags)[MAX_OPERANDS],
|
||||
const CodeGenInstruction &inst) {
|
||||
if (!inst.TheDef->isSubClassOf("X86Inst"))
|
||||
return;
|
||||
|
||||
unsigned int index;
|
||||
unsigned int numOperands = inst.OperandList.size();
|
||||
|
||||
for (index = 0; index < numOperands; ++index) {
|
||||
const CodeGenInstruction::OperandInfo &operandInfo =
|
||||
inst.OperandList[index];
|
||||
Record &rec = *operandInfo.Rec;
|
||||
|
||||
if (X86FlagFromOpName(operandFlags[index], rec.getName())) {
|
||||
errs() << "Operand type: " << rec.getName().c_str() << "\n";
|
||||
errs() << "Operand name: " << operandInfo.Name.c_str() << "\n";
|
||||
errs() << "Instruction mame: " << inst.TheDef->getName().c_str() << "\n";
|
||||
llvm_unreachable("Unhandled type");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// decorate1 - Decorates a named operand with a new flag
|
||||
///
|
||||
/// @operandFlags - The array of operand flag objects, which don't have names
|
||||
/// @inst - The CodeGenInstruction, which provides a way to translate
|
||||
/// between names and operand indices
|
||||
/// @opName - The name of the operand
|
||||
/// @flag - The name of the flag to add
|
||||
static inline void decorate1(FlagsConstantEmitter *(&operandFlags)[MAX_OPERANDS],
|
||||
const CodeGenInstruction &inst,
|
||||
const char *opName,
|
||||
const char *opFlag) {
|
||||
unsigned opIndex;
|
||||
|
||||
try {
|
||||
opIndex = inst.getOperandNamed(std::string(opName));
|
||||
}
|
||||
catch (...) {
|
||||
errs() << "Instruction: " << inst.TheDef->getName().c_str() << "\n";
|
||||
errs() << "Operand name: " << opName << "\n";
|
||||
llvm_unreachable("Couldn't find operand");
|
||||
}
|
||||
|
||||
operandFlags[opIndex]->addEntry(opFlag);
|
||||
}
|
||||
|
||||
#define DECORATE1(opName, opFlag) decorate1(operandFlags, inst, opName, opFlag)
|
||||
|
||||
#define MOV(source, target) { \
|
||||
instFlags.addEntry("kInstructionFlagMove"); \
|
||||
DECORATE1(source, "kOperandFlagSource"); \
|
||||
DECORATE1(target, "kOperandFlagTarget"); \
|
||||
}
|
||||
|
||||
#define BRANCH(target) { \
|
||||
instFlags.addEntry("kInstructionFlagBranch"); \
|
||||
DECORATE1(target, "kOperandFlagTarget"); \
|
||||
}
|
||||
|
||||
#define PUSH(source) { \
|
||||
instFlags.addEntry("kInstructionFlagPush"); \
|
||||
DECORATE1(source, "kOperandFlagSource"); \
|
||||
}
|
||||
|
||||
#define POP(target) { \
|
||||
instFlags.addEntry("kInstructionFlagPop"); \
|
||||
DECORATE1(target, "kOperandFlagTarget"); \
|
||||
}
|
||||
|
||||
#define CALL(target) { \
|
||||
instFlags.addEntry("kInstructionFlagCall"); \
|
||||
DECORATE1(target, "kOperandFlagTarget"); \
|
||||
}
|
||||
|
||||
#define RETURN() { \
|
||||
instFlags.addEntry("kInstructionFlagReturn"); \
|
||||
}
|
||||
|
||||
/// X86ExtractSemantics - Performs various checks on the name of an X86
|
||||
/// instruction to determine what sort of an instruction it is and then adds
|
||||
/// the appropriate flags to the instruction and its operands
|
||||
///
|
||||
/// @arg instFlags - A reference to the flags for the instruction as a whole
|
||||
/// @arg operandFlags - A reference to the array of operand flag object pointers
|
||||
/// @arg inst - A reference to the original instruction
|
||||
static void X86ExtractSemantics(FlagsConstantEmitter &instFlags,
|
||||
FlagsConstantEmitter *(&operandFlags)[MAX_OPERANDS],
|
||||
const CodeGenInstruction &inst) {
|
||||
const std::string &name = inst.TheDef->getName();
|
||||
|
||||
if (name.find("MOV") != name.npos) {
|
||||
if (name.find("MOV_V") != name.npos) {
|
||||
// ignore (this is a pseudoinstruction)
|
||||
}
|
||||
else if (name.find("MASK") != name.npos) {
|
||||
// ignore (this is a masking move)
|
||||
}
|
||||
else if (name.find("r0") != name.npos) {
|
||||
// ignore (this is a pseudoinstruction)
|
||||
}
|
||||
else if (name.find("PS") != name.npos ||
|
||||
name.find("PD") != name.npos) {
|
||||
// ignore (this is a shuffling move)
|
||||
}
|
||||
else if (name.find("MOVS") != name.npos) {
|
||||
// ignore (this is a string move)
|
||||
}
|
||||
else if (name.find("_F") != name.npos) {
|
||||
// TODO handle _F moves to ST(0)
|
||||
}
|
||||
else if (name.find("a") != name.npos) {
|
||||
// TODO handle moves to/from %ax
|
||||
}
|
||||
else if (name.find("CMOV") != name.npos) {
|
||||
MOV("src2", "dst");
|
||||
}
|
||||
else if (name.find("PC") != name.npos) {
|
||||
MOV("label", "reg")
|
||||
}
|
||||
else {
|
||||
MOV("src", "dst");
|
||||
}
|
||||
}
|
||||
|
||||
if (name.find("JMP") != name.npos ||
|
||||
name.find("J") == 0) {
|
||||
if (name.find("FAR") != name.npos && name.find("i") != name.npos) {
|
||||
BRANCH("off");
|
||||
}
|
||||
else {
|
||||
BRANCH("dst");
|
||||
}
|
||||
}
|
||||
|
||||
if (name.find("PUSH") != name.npos) {
|
||||
if (name.find("FS") != name.npos ||
|
||||
name.find("GS") != name.npos) {
|
||||
instFlags.addEntry("kInstructionFlagPush");
|
||||
// TODO add support for fixed operands
|
||||
}
|
||||
else if (name.find("F") != name.npos) {
|
||||
// ignore (this pushes onto the FP stack)
|
||||
}
|
||||
else if (name[name.length() - 1] == 'm') {
|
||||
PUSH("src");
|
||||
}
|
||||
else if (name.find("i") != name.npos) {
|
||||
PUSH("imm");
|
||||
}
|
||||
else {
|
||||
PUSH("reg");
|
||||
}
|
||||
}
|
||||
|
||||
if (name.find("POP") != name.npos) {
|
||||
if (name.find("POPCNT") != name.npos) {
|
||||
// ignore (not a real pop)
|
||||
}
|
||||
else if (name.find("FS") != name.npos ||
|
||||
name.find("GS") != name.npos) {
|
||||
instFlags.addEntry("kInstructionFlagPop");
|
||||
// TODO add support for fixed operands
|
||||
}
|
||||
else if (name.find("F") != name.npos) {
|
||||
// ignore (this pops from the FP stack)
|
||||
}
|
||||
else if (name[name.length() - 1] == 'm') {
|
||||
POP("dst");
|
||||
}
|
||||
else {
|
||||
POP("reg");
|
||||
}
|
||||
}
|
||||
|
||||
if (name.find("CALL") != name.npos) {
|
||||
if (name.find("ADJ") != name.npos) {
|
||||
// ignore (not a call)
|
||||
}
|
||||
else if (name.find("SYSCALL") != name.npos) {
|
||||
// ignore (doesn't go anywhere we know about)
|
||||
}
|
||||
else if (name.find("VMCALL") != name.npos) {
|
||||
// ignore (rather different semantics than a regular call)
|
||||
}
|
||||
else if (name.find("FAR") != name.npos && name.find("i") != name.npos) {
|
||||
CALL("off");
|
||||
}
|
||||
else {
|
||||
CALL("dst");
|
||||
}
|
||||
}
|
||||
|
||||
if (name.find("RET") != name.npos) {
|
||||
RETURN();
|
||||
}
|
||||
}
|
||||
|
||||
#undef MOV
|
||||
#undef BRANCH
|
||||
#undef PUSH
|
||||
#undef POP
|
||||
#undef CALL
|
||||
#undef RETURN
|
||||
|
||||
#undef COND_DECORATE_2
|
||||
#undef COND_DECORATE_1
|
||||
#undef DECORATE1
|
||||
|
||||
/// populateInstInfo - Fills an array of InstInfos with information about each
|
||||
/// instruction in a target
|
||||
///
|
||||
/// @arg infoArray - The array of InstInfo objects to populate
|
||||
/// @arg target - The CodeGenTarget to use as a source of instructions
|
||||
static void populateInstInfo(CompoundConstantEmitter &infoArray,
|
||||
CodeGenTarget &target) {
|
||||
std::vector<const CodeGenInstruction*> numberedInstructions;
|
||||
target.getInstructionsByEnumValue(numberedInstructions);
|
||||
|
||||
unsigned int index;
|
||||
unsigned int numInstructions = numberedInstructions.size();
|
||||
|
||||
for (index = 0; index < numInstructions; ++index) {
|
||||
const CodeGenInstruction& inst = *numberedInstructions[index];
|
||||
|
||||
CompoundConstantEmitter *infoStruct = new CompoundConstantEmitter;
|
||||
infoArray.addEntry(infoStruct);
|
||||
|
||||
FlagsConstantEmitter *instFlags = new FlagsConstantEmitter;
|
||||
infoStruct->addEntry(instFlags);
|
||||
|
||||
LiteralConstantEmitter *numOperandsEmitter =
|
||||
new LiteralConstantEmitter(inst.OperandList.size());
|
||||
infoStruct->addEntry(numOperandsEmitter);
|
||||
|
||||
CompoundConstantEmitter *operandFlagArray = new CompoundConstantEmitter;
|
||||
infoStruct->addEntry(operandFlagArray);
|
||||
|
||||
FlagsConstantEmitter *operandFlags[MAX_OPERANDS];
|
||||
|
||||
for (unsigned operandIndex = 0; operandIndex < MAX_OPERANDS; ++operandIndex) {
|
||||
operandFlags[operandIndex] = new FlagsConstantEmitter;
|
||||
operandFlagArray->addEntry(operandFlags[operandIndex]);
|
||||
}
|
||||
|
||||
unsigned numSyntaxes = 0;
|
||||
|
||||
if (target.getName() == "X86") {
|
||||
X86PopulateOperands(operandFlags, inst);
|
||||
X86ExtractSemantics(*instFlags, operandFlags, inst);
|
||||
numSyntaxes = 2;
|
||||
}
|
||||
|
||||
CompoundConstantEmitter *operandOrderArray = new CompoundConstantEmitter;
|
||||
infoStruct->addEntry(operandOrderArray);
|
||||
|
||||
for (unsigned syntaxIndex = 0; syntaxIndex < MAX_SYNTAXES; ++syntaxIndex) {
|
||||
CompoundConstantEmitter *operandOrder = new CompoundConstantEmitter;
|
||||
operandOrderArray->addEntry(operandOrder);
|
||||
|
||||
if (syntaxIndex < numSyntaxes) {
|
||||
std::string asmString = inst.AsmString;
|
||||
asmString = resolveBraces(asmString, syntaxIndex);
|
||||
populateOperandOrder(operandOrder, asmString, inst);
|
||||
}
|
||||
else {
|
||||
for (unsigned operandIndex = 0;
|
||||
operandIndex < MAX_OPERANDS;
|
||||
++operandIndex) {
|
||||
operandOrder->addEntry(new LiteralConstantEmitter("-1"));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void EDEmitter::run(raw_ostream &o) {
|
||||
unsigned int i = 0;
|
||||
|
||||
CompoundConstantEmitter infoArray;
|
||||
CodeGenTarget target;
|
||||
|
||||
populateInstInfo(infoArray, target);
|
||||
|
||||
o << "InstInfo instInfo" << target.getName().c_str() << "[] = ";
|
||||
infoArray.emit(o, i);
|
||||
o << ";" << "\n";
|
||||
}
|
||||
|
||||
void EDEmitter::runHeader(raw_ostream &o) {
|
||||
EmitSourceFileHeader("Semantic Information Header", o);
|
||||
|
||||
o << "#ifndef SemanticInfo_" << "\n";
|
||||
o << "#define SemanticInfo_" << "\n";
|
||||
o << "\n";
|
||||
o << "#include <inttypes.h>" << "\n";
|
||||
o << "\n";
|
||||
o << "#define MAX_OPERANDS " << format("%d", MAX_OPERANDS) << "\n";
|
||||
o << "#define MAX_SYNTAXES " << format("%d", MAX_SYNTAXES) << "\n";
|
||||
o << "\n";
|
||||
|
||||
unsigned int i = 0;
|
||||
|
||||
EnumEmitter operandFlags("OperandFlags");
|
||||
operandFlags.addEntry("kOperandFlagImmediate");
|
||||
operandFlags.addEntry("kOperandFlagRegister");
|
||||
operandFlags.addEntry("kOperandFlagMemory");
|
||||
operandFlags.addEntry("kOperandFlagEffectiveAddress");
|
||||
operandFlags.addEntry("kOperandFlagPCRelative");
|
||||
operandFlags.addEntry("kOperandFlagSource");
|
||||
operandFlags.addEntry("kOperandFlagTarget");
|
||||
operandFlags.emitAsFlags(o, i);
|
||||
|
||||
o << "\n";
|
||||
|
||||
EnumEmitter instructionFlags("InstructionFlags");
|
||||
instructionFlags.addEntry("kInstructionFlagMove");
|
||||
instructionFlags.addEntry("kInstructionFlagBranch");
|
||||
instructionFlags.addEntry("kInstructionFlagPush");
|
||||
instructionFlags.addEntry("kInstructionFlagPop");
|
||||
instructionFlags.addEntry("kInstructionFlagCall");
|
||||
instructionFlags.addEntry("kInstructionFlagReturn");
|
||||
instructionFlags.emitAsFlags(o, i);
|
||||
|
||||
o << "\n";
|
||||
|
||||
StructEmitter instInfo("InstInfo");
|
||||
instInfo.addMember("uint32_t", "instructionFlags");
|
||||
instInfo.addMember("uint8_t", "numOperands");
|
||||
instInfo.addMember("uint8_t", "operandFlags[MAX_OPERANDS]");
|
||||
instInfo.addMember("const char", "operandOrders[MAX_SYNTAXES][MAX_OPERANDS]");
|
||||
instInfo.emit(o, i);
|
||||
|
||||
o << "\n";
|
||||
o << "#endif" << "\n";
|
||||
}
|
||||
37
utils/TableGen/EDEmitter.h
Normal file
37
utils/TableGen/EDEmitter.h
Normal file
@ -0,0 +1,37 @@
|
||||
//===- EDEmitter.h - Generate instruction descriptions for ED ---*- C++ -*-===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
// This file is distributed under the University of Illinois Open Source
|
||||
// License. See LICENSE.TXT for details.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
//
|
||||
// This tablegen backend is responsible for emitting a description of each
|
||||
// instruction in a format that the semantic disassembler can use to tokenize
|
||||
// and parse instructions.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#ifndef SEMANTIC_INFO_EMITTER_H
|
||||
#define SEMANTIC_INFO_EMITTER_H
|
||||
|
||||
#include "TableGenBackend.h"
|
||||
|
||||
namespace llvm {
|
||||
|
||||
class EDEmitter : public TableGenBackend {
|
||||
RecordKeeper &Records;
|
||||
public:
|
||||
EDEmitter(RecordKeeper &R);
|
||||
|
||||
// run - Output the instruction table.
|
||||
void run(raw_ostream &o);
|
||||
|
||||
// runHeader - Emit a header file that allows use of the instruction table.
|
||||
void runHeader(raw_ostream &o);
|
||||
};
|
||||
|
||||
} // End llvm namespace
|
||||
|
||||
#endif
|
||||
@ -22,6 +22,7 @@
|
||||
#include "CodeEmitterGen.h"
|
||||
#include "DAGISelEmitter.h"
|
||||
#include "DisassemblerEmitter.h"
|
||||
#include "EDEmitter.h"
|
||||
#include "FastISelEmitter.h"
|
||||
#include "InstrEnumEmitter.h"
|
||||
#include "InstrInfoEmitter.h"
|
||||
@ -58,6 +59,7 @@ enum ActionType {
|
||||
GenIntrinsic,
|
||||
GenTgtIntrinsic,
|
||||
GenLLVMCConf,
|
||||
GenEDHeader, GenEDInfo,
|
||||
PrintEnums
|
||||
};
|
||||
|
||||
@ -106,6 +108,10 @@ namespace {
|
||||
"Generate Clang diagnostic groups"),
|
||||
clEnumValN(GenLLVMCConf, "gen-llvmc",
|
||||
"Generate LLVMC configuration library"),
|
||||
clEnumValN(GenEDHeader, "gen-enhanced-disassembly-header",
|
||||
"Generate enhanced disassembly info header"),
|
||||
clEnumValN(GenEDInfo, "gen-enhanced-disassembly-info",
|
||||
"Generate enhanced disassembly info"),
|
||||
clEnumValN(PrintEnums, "print-enums",
|
||||
"Print enum values for a class"),
|
||||
clEnumValEnd));
|
||||
@ -259,6 +265,12 @@ int main(int argc, char **argv) {
|
||||
case GenLLVMCConf:
|
||||
LLVMCConfigurationEmitter(Records).run(*Out);
|
||||
break;
|
||||
case GenEDHeader:
|
||||
EDEmitter(Records).runHeader(*Out);
|
||||
break;
|
||||
case GenEDInfo:
|
||||
EDEmitter(Records).run(*Out);
|
||||
break;
|
||||
case PrintEnums:
|
||||
{
|
||||
std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user