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Fix UB in APInt::ashr
i64 -1, whose sign bit is the 0th one, can't be left shifted without invoking UB. https://reviews.llvm.org/D23362 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278280 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -1042,11 +1042,7 @@ APInt APInt::ashr(unsigned shiftAmt) const {
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if (isSingleWord()) {
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if (shiftAmt == BitWidth)
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return APInt(BitWidth, 0); // undefined
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else {
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unsigned SignBit = APINT_BITS_PER_WORD - BitWidth;
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return APInt(BitWidth,
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(((int64_t(VAL) << SignBit) >> SignBit) >> shiftAmt));
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}
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return APInt(BitWidth, SignExtend64(VAL, BitWidth) >> shiftAmt);
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}
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// If all the bits were shifted out, the result is, technically, undefined.
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