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Add support for scalarizing cttz_zero_undef

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Follow up to r214266. Add missing case in ScalarizeVectorResult() for
cttz_zero_undef.

Differential Revision: http://reviews.llvm.org/D4813


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215330 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Petar Jovanovic 2014-08-10 22:49:54 +00:00
parent 3e5734dc38
commit 97b0c63f6b
2 changed files with 38 additions and 0 deletions
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1
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
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@ -72,6 +72,7 @@ void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
case ISD::CTLZ_ZERO_UNDEF:
case ISD::CTPOP:
case ISD::CTTZ:
case ISD::CTTZ_ZERO_UNDEF:
case ISD::FABS:
case ISD::FCEIL:
case ISD::FCOS:

37
test/CodeGen/Mips/cttz-v.ll Normal file
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@ -0,0 +1,37 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=MIPS32
; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64
declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1)
define <2 x i32> @cttzv2i32(<2 x i32> %x) {
entry:
; MIPS32-DAG: addiu $[[R0:[0-9]+]], $4, -1
; MIPS32-DAG: not $[[R1:[0-9]+]], $4
; MIPS32-DAG: and $[[R2:[0-9]+]], $[[R1]], $[[R0]]
; MIPS32-DAG: clz $[[R3:[0-9]+]], $[[R2]]
; MIPS32-DAG: addiu $[[R4:[0-9]+]], $zero, 32
; MIPS32-DAG: subu $2, $[[R4]], $[[R3]]
; MIPS32-DAG: addiu $[[R5:[0-9]+]], $5, -1
; MIPS32-DAG: not $[[R6:[0-9]+]], $5
; MIPS32-DAG: and $[[R7:[0-9]+]], $[[R6]], $[[R5]]
; MIPS32-DAG: clz $[[R8:[0-9]+]], $[[R7]]
; MIPS32-DAG: jr $ra
; MIPS32-DAG: subu $3, $[[R4]], $[[R8]]
; MIPS64-DAG: addiu $[[R0:[0-9]+]], $4, -1
; MIPS64-DAG: not $[[R1:[0-9]+]], $4
; MIPS64-DAG: and $[[R2:[0-9]+]], $[[R1]], $[[R0]]
; MIPS64-DAG: clz $[[R3:[0-9]+]], $[[R2]]
; MIPS64-DAG: addiu $[[R4:[0-9]+]], $zero, 32
; MIPS64-DAG: subu $2, $[[R4]], $[[R3]]
; MIPS64-DAG: addiu $[[R5:[0-9]+]], $5, -1
; MIPS64-DAG: not $[[R6:[0-9]+]], $5
; MIPS64-DAG: and $[[R7:[0-9]+]], $[[R6]], $[[R5]]
; MIPS64-DAG: clz $[[R8:[0-9]+]], $[[R7]]
; MIPS64-DAG: jr $ra
; MIPS64-DAG: subu $3, $[[R4]], $[[R8]]
%ret = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %x, i1 true)
ret <2 x i32> %ret
}