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Fix N^2 algorithm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6112 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -122,41 +122,50 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
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// source path the PHI.
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// source path the PHI.
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MachineBasicBlock &opBlock = *MI->getOperand(i).getMachineBasicBlock();
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MachineBasicBlock &opBlock = *MI->getOperand(i).getMachineBasicBlock();
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// Figure out where to insert the copy, which is at the end of the
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// predecessor basic block, but before any terminator/branch
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// instructions...
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MachineBasicBlock::iterator I = opBlock.end();
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if (I != opBlock.begin()) { // Handle empty blocks
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--I;
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// must backtrack over ALL the branches in the previous block
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while (MII.isTerminatorInstr((*I)->getOpcode()) &&
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I != opBlock.begin())
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--I;
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// move back to the first branch instruction so new instructions
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// are inserted right in front of it and not in front of a non-branch
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if (!MII.isTerminatorInstr((*I)->getOpcode()))
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++I;
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}
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// Check to make sure we haven't already emitted the copy for this block.
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// Check to make sure we haven't already emitted the copy for this block.
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// This can happen because PHI nodes may have multiple entries for the
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// This can happen because PHI nodes may have multiple entries for the
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// same basic block. It doesn't matter which entry we use though, because
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// same basic block. It doesn't matter which entry we use though, because
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// all incoming values are guaranteed to be the same for a particular bb.
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// all incoming values are guaranteed to be the same for a particular bb.
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//
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//
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// Note that this is N^2 in the number of phi node entries, but since the
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// If we emitted a copy for this basic block already, it will be right
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// # of entries is usually small, this is not a problem. FIXME: this
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// where we want to insert one now. Just check for a definition of the
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// should just check to see if there is already a copy in the bottom of
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// register we are interested in!
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// this basic block!
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//
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//
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bool HaveNotEmitted = true;
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bool HaveNotEmitted = true;
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for (int op = MI->getNumOperands() - 1; op != i; op -= 2)
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if (&opBlock == MI->getOperand(op).getMachineBasicBlock()) {
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if (I != opBlock.begin()) {
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HaveNotEmitted = false;
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MachineInstr *PrevInst = *(I-1);
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break;
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for (unsigned i = 0, e = PrevInst->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = PrevInst->getOperand(i);
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if (MO.isVirtualRegister() && MO.getReg() == IncomingReg)
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if (MO.opIsDef() || MO.opIsDefAndUse()) {
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HaveNotEmitted = false;
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break;
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}
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}
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}
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}
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if (HaveNotEmitted) {
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if (HaveNotEmitted) {
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MachineBasicBlock::iterator I = opBlock.end();
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assert(opVal.isVirtualRegister() &&
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if (I != opBlock.begin()) { // Handle empty blocks
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"Machine PHI Operands must all be virtual registers!");
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--I;
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RegInfo->copyRegToReg(opBlock, I, IncomingReg, opVal.getReg(), RC);
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// must backtrack over ALL the branches in the previous block
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while (MII.isTerminatorInstr((*I)->getOpcode()) &&
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I != opBlock.begin())
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--I;
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// move back to the first branch instruction so new instructions
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// are inserted right in front of it and not in front of a non-branch
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if (!MII.isTerminatorInstr((*I)->getOpcode()))
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++I;
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}
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assert(opVal.isVirtualRegister() &&
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"Machine PHI Operands must all be virtual registers!");
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RegInfo->copyRegToReg(opBlock, I, IncomingReg, opVal.getReg(), RC);
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}
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}
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}
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}
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