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Fix a bug in DAGCombiner::MatchBSwapHWord. Make sure the node has operands before referencing them. rdar://12868039

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170078 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2012-12-13 01:34:32 +00:00
parent b573539c6b
commit 9a65a01eeb
2 changed files with 48 additions and 1 deletions
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3
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -2984,7 +2984,8 @@ SDValue DAGCombiner::MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1) {
SDValue N00 = N0.getOperand(0);
SDValue N01 = N0.getOperand(1);
if (N1.getOpcode() == ISD::OR) {
if (N1.getOpcode() == ISD::OR &&
N00.getNumOperands() == 2 && N01.getNumOperands() == 2) {
// (or (or (and), (and)), (or (and), (and)))
SDValue N000 = N00.getOperand(0);
if (!isBSwapHWordElement(N000, Parts))

46
test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll Normal file
View File

@ -0,0 +1,46 @@
; RUN: llc -march=x86 -mtriple=i686-apple-ios -mcpu=yonah < %s
; rdar://12868039
define void @t() nounwind ssp {
%1 = alloca i32
%2 = ptrtoint i32* %1 to i32
br label %3
; <label>:3 ; preds = %5, %3, %0
switch i32 undef, label %3 [
i32 611946160, label %5
i32 954117870, label %4
]
; <label>:4 ; preds = %3
ret void
; <label>:5 ; preds = %5, %3
%6 = add i32 0, 148
%7 = and i32 %6, 48
%8 = add i32 %7, 0
%9 = or i32 %2, %8
%10 = xor i32 -1, %2
%11 = or i32 %8, %10
%12 = or i32 %9, %11
%13 = xor i32 %9, %11
%14 = sub i32 %12, %13
%15 = xor i32 2044674005, %14
%16 = xor i32 %15, 0
%17 = shl nuw nsw i32 %16, 1
%18 = sub i32 0, %17
%19 = and i32 %18, 2051242402
%20 = sub i32 0, %19
%21 = xor i32 %20, 0
%22 = xor i32 %21, 0
%23 = add i32 0, %22
%24 = shl i32 %23, 1
%25 = or i32 1, %24
%26 = add i32 0, %25
%27 = trunc i32 %26 to i8
%28 = xor i8 %27, 125
%29 = add i8 %28, -16
%30 = add i8 0, %29
store i8 %30, i8* null
br i1 undef, label %5, label %3
}