diff --git a/test/CodeGen/Mips/msa/2rf_float_int.ll b/test/CodeGen/Mips/msa/2rf_float_int.ll index e0a60d6a2d6..1dbb2288221 100644 --- a/test/CodeGen/Mips/msa/2rf_float_int.ll +++ b/test/CodeGen/Mips/msa/2rf_float_int.ll @@ -17,9 +17,11 @@ entry: declare <4 x float> @llvm.mips.ffint.s.w(<4 x i32>) nounwind ; CHECK: llvm_mips_ffint_s_w_test: -; CHECK: ld.w -; CHECK: ffint_s.w -; CHECK: st.w +; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_ffint_s_w_ARG1) +; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]]) +; CHECK-DAG: ffint_s.w [[WD:\$w[0-9]+]], [[WS]] +; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_ffint_s_w_RES) +; CHECK-DAG: st.w [[WD]], 0([[R2]]) ; CHECK: .size llvm_mips_ffint_s_w_test ; @llvm_mips_ffint_s_d_ARG1 = global <2 x i64> , align 16 @@ -36,9 +38,11 @@ entry: declare <2 x double> @llvm.mips.ffint.s.d(<2 x i64>) nounwind ; CHECK: llvm_mips_ffint_s_d_test: -; CHECK: ld.d -; CHECK: ffint_s.d -; CHECK: st.d +; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_ffint_s_d_ARG1) +; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]]) +; CHECK-DAG: ffint_s.d [[WD:\$w[0-9]+]], [[WS]] +; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_ffint_s_d_RES) +; CHECK-DAG: st.d [[WD]], 0([[R2]]) ; CHECK: .size llvm_mips_ffint_s_d_test ; @llvm_mips_ffint_u_w_ARG1 = global <4 x i32> , align 16 @@ -55,9 +59,11 @@ entry: declare <4 x float> @llvm.mips.ffint.u.w(<4 x i32>) nounwind ; CHECK: llvm_mips_ffint_u_w_test: -; CHECK: ld.w -; CHECK: ffint_u.w -; CHECK: st.w +; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_ffint_u_w_ARG1) +; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]]) +; CHECK-DAG: ffint_u.w [[WD:\$w[0-9]+]], [[WS]] +; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_ffint_u_w_RES) +; CHECK-DAG: st.w [[WD]], 0([[R2]]) ; CHECK: .size llvm_mips_ffint_u_w_test ; @llvm_mips_ffint_u_d_ARG1 = global <2 x i64> , align 16 @@ -74,8 +80,10 @@ entry: declare <2 x double> @llvm.mips.ffint.u.d(<2 x i64>) nounwind ; CHECK: llvm_mips_ffint_u_d_test: -; CHECK: ld.d -; CHECK: ffint_u.d -; CHECK: st.d +; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_ffint_u_d_ARG1) +; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]]) +; CHECK-DAG: ffint_u.d [[WD:\$w[0-9]+]], [[WS]] +; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_ffint_u_d_RES) +; CHECK-DAG: st.d [[WD]], 0([[R2]]) ; CHECK: .size llvm_mips_ffint_u_d_test ;