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R600/SI: f64 frint is legal on CI

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206475 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2014-04-17 17:06:37 +00:00
parent fa477d9837
commit 9e383d4b48
4 changed files with 63 additions and 29 deletions
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1
lib/Target/R600/SIISelLowering.cpp
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@ -212,6 +212,7 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) :
setOperationAction(ISD::FTRUNC, MVT::f64, Legal);
setOperationAction(ISD::FCEIL, MVT::f64, Legal);
setOperationAction(ISD::FFLOOR, MVT::f64, Legal);
setOperationAction(ISD::FRINT, MVT::f64, Legal);
}
setTargetDAGCombine(ISD::SELECT_CC);

5
lib/Target/R600/SIInstructions.td
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@ -2144,8 +2144,9 @@ defm V_CEIL_F64 : VOP1_64 <0x00000018, "V_CEIL_F64",
defm V_FLOOR_F64 : VOP1_64 <0x0000001A, "V_FLOOR_F64",
[(set f64:$dst, (ffloor f64:$src0))]
>;
defm V_RNDNE_F64 : VOP1_64 <0x00000019, "V_RNDNE_F64", []>;
defm V_RNDNE_F64 : VOP1_64 <0x00000019, "V_RNDNE_F64",
[(set f64:$dst, (frint f64:$src0))]
>;
def V_QSAD_PK_U16_U8 : VOP3_32 <0x00000173, "V_QSAD_PK_U16_U8", []>;
def V_MQSAD_U16_U8 : VOP3_32 <0x000000172, "V_MQSAD_U16_U8", []>;

37
test/CodeGen/R600/llvm.rint.f64.ll Normal file
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@ -0,0 +1,37 @@
; RUN: llc -march=r600 -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
; FUNC-LABEL: @f64
; CI: V_RNDNE_F64_e32
define void @f64(double addrspace(1)* %out, double %in) {
entry:
%0 = call double @llvm.rint.f64(double %in)
store double %0, double addrspace(1)* %out
ret void
}
; FUNC-LABEL: @v2f64
; CI: V_RNDNE_F64_e32
; CI: V_RNDNE_F64_e32
define void @v2f64(<2 x double> addrspace(1)* %out, <2 x double> %in) {
entry:
%0 = call <2 x double> @llvm.rint.v2f64(<2 x double> %in)
store <2 x double> %0, <2 x double> addrspace(1)* %out
ret void
}
; FUNC-LABEL: @v4f64
; CI: V_RNDNE_F64_e32
; CI: V_RNDNE_F64_e32
; CI: V_RNDNE_F64_e32
; CI: V_RNDNE_F64_e32
define void @v4f64(<4 x double> addrspace(1)* %out, <4 x double> %in) {
entry:
%0 = call <4 x double> @llvm.rint.v4f64(<4 x double> %in)
store <4 x double> %0, <4 x double> addrspace(1)* %out
ret void
}
declare double @llvm.rint.f64(double) #0
declare <2 x double> @llvm.rint.v2f64(<2 x double>) #0
declare <4 x double> @llvm.rint.v4f64(<4 x double>) #0

49
test/CodeGen/R600/llvm.rint.ll
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@ -1,10 +1,10 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; R600-CHECK: @f32
; R600-CHECK: RNDNE
; SI-CHECK: @f32
; SI-CHECK: V_RNDNE_F32_e32
; FUNC-LABEL: @f32
; R600: RNDNE
; SI: V_RNDNE_F32_e32
define void @f32(float addrspace(1)* %out, float %in) {
entry:
%0 = call float @llvm.rint.f32(float %in)
@ -12,12 +12,12 @@ entry:
ret void
}
; R600-CHECK: @v2f32
; R600-CHECK: RNDNE
; R600-CHECK: RNDNE
; SI-CHECK: @v2f32
; SI-CHECK: V_RNDNE_F32_e32
; SI-CHECK: V_RNDNE_F32_e32
; FUNC-LABEL: @v2f32
; R600: RNDNE
; R600: RNDNE
; SI: V_RNDNE_F32_e32
; SI: V_RNDNE_F32_e32
define void @v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
entry:
%0 = call <2 x float> @llvm.rint.v2f32(<2 x float> %in)
@ -25,16 +25,16 @@ entry:
ret void
}
; R600-CHECK: @v4f32
; R600-CHECK: RNDNE
; R600-CHECK: RNDNE
; R600-CHECK: RNDNE
; R600-CHECK: RNDNE
; SI-CHECK: @v4f32
; SI-CHECK: V_RNDNE_F32_e32
; SI-CHECK: V_RNDNE_F32_e32
; SI-CHECK: V_RNDNE_F32_e32
; SI-CHECK: V_RNDNE_F32_e32
; FUNC-LABEL: @v4f32
; R600: RNDNE
; R600: RNDNE
; R600: RNDNE
; R600: RNDNE
; SI: V_RNDNE_F32_e32
; SI: V_RNDNE_F32_e32
; SI: V_RNDNE_F32_e32
; SI: V_RNDNE_F32_e32
define void @v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
entry:
%0 = call <4 x float> @llvm.rint.v4f32(<4 x float> %in)
@ -42,13 +42,8 @@ entry:
ret void
}
; Function Attrs: nounwind readonly
declare float @llvm.rint.f32(float) #0
; Function Attrs: nounwind readonly
declare <2 x float> @llvm.rint.v2f32(<2 x float>) #0
; Function Attrs: nounwind readonly
declare <4 x float> @llvm.rint.v4f32(<4 x float>) #0
attributes #0 = { nounwind readonly }